coreboot-kgpe-d16/src
Patrick Georgi 8b12a28116 edid: fill reserved bits fields in cb_framebuffer
If it's a 4 byte format (as per documentation), there
are some reserved bits, so let's mark them as such...

Unfortunately undone while upstreaming changes.

Change-Id: I50f12cfff2c9bb9d082a5f3c3ac54c0d514d862c
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Originally-Reviewed-on: http://review.coreboot.org/7674
Reviewed-on: http://review.coreboot.org/7964
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-12-29 11:14:34 +01:00
..
arch RELOCATABLE_RAMSTAGE: Fix weak symbols in ACPI 2014-12-28 19:57:06 +01:00
console ipq8064: prepare UART driver for use in coreboot 2014-12-05 20:22:47 +01:00
cpu intel: Fix microcode alignment 2014-12-28 19:57:37 +01:00
device RELOCATABLE_RAMSTAGE: Fix weak symbols with option ROMs 2014-12-28 19:57:16 +01:00
drivers TPM: Fix i2c driver dependency 2014-12-23 04:13:32 +01:00
ec i2c: Replace the i2c API. 2014-12-16 00:02:43 +01:00
include RELOCATABLE_RAMSTAGE: Fix weak symbols with option ROMs 2014-12-28 19:57:16 +01:00
lib edid: fill reserved bits fields in cb_framebuffer 2014-12-29 11:14:34 +01:00
mainboard blaze: change ramcode 0001/0010 to use 792MHz bct 2014-12-26 19:45:52 +01:00
northbridge northbridge/amd/pi/northbridge.c: Remove superfluous logic operand 2014-12-29 04:06:23 +01:00
soc intel baytrail broadwell: Include microcode updates 2014-12-28 20:01:19 +01:00
southbridge AGESA: Add amd_initcpuio() and amd_initmmio() 2014-12-20 07:18:00 +01:00
superio Drop Intel E7520 and E7525 and related boards 2014-12-18 02:11:06 +01:00
vendorcode amd/agesa/f15/Proc/Common/S3SaveState.c: Sync with f15tn 2014-12-22 11:11:17 +01:00
Kconfig Revert "src/Kconfig: Don't treat warns as errors on Clang builds yet" 2014-12-29 04:06:29 +01:00