coreboot-kgpe-d16/src/mainboard/google/oak
Joel Kitching ae0fb762a2 chromeos: clean up "recovery" and "write protect" GPIOs
The "write protect" GPIO's cached value is never actually
read after entering depthcharge.  Ensure the value from
get_write_protect_state() is being transferred accurately,
so that we may read this GPIO value in depthcharge without
resampling.

The cached value of the "recovery" GPIO is read only on certain
boards which have a physical recovery switch.  Correct some of
the values sent to boards which presumably never read the
previously incorrect value.  Most of these inaccuracies are from
non-inverted values on ACTIVE_LOW GPIOs.

BUG=b:124141368, b:124192753, chromium:950273
TEST=make clean && make test-abuild
BRANCH=none

Change-Id: Ic17a98768703d7098480a9233b752fe5b201bd51
Signed-off-by: Joel Kitching <kitching@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32233
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-04-11 11:23:26 +00:00
..
sdram_inf
board_info.txt
boardid.c
bootblock.c src: Use include <delay.h> when appropriate 2019-04-06 16:09:12 +00:00
chromeos.c chromeos: clean up "recovery" and "write protect" GPIOs 2019-04-11 11:23:26 +00:00
chromeos.fmd mainboard: Enable PRESERVE flag in all vboot/chromeos FMD files 2019-03-05 20:52:06 +00:00
devicetree.cb
gpio.h google/oak: Delete rowan 2019-03-28 06:37:26 +00:00
Kconfig google/oak: Delete rowan 2019-03-28 06:37:26 +00:00
Kconfig.name google/oak: Delete rowan 2019-03-28 06:37:26 +00:00
mainboard.c google/oak: Delete rowan 2019-03-28 06:37:26 +00:00
Makefile.inc
memlayout.ld
romstage.c arm64: Factor out common parts of romstage execution flow 2018-08-17 21:29:46 +00:00
sdram_configs.c
tpm_tis.c security/tpm: Change TPM naming for different layers. 2018-01-18 01:45:35 +00:00