Ronald G. Minnich 8b93059ecc Pass the CPU index as a parameter to startup. ... This addition is in support of future multicore support in coreboot. It also will allow us to remove some asssembly code. The CPU "index" -- i.e., its order in the sequence in which cores are brought up, NOT its APIC id -- is passed into the secondary start. We modify the function to specify regparm(0). We also take this opportunity to do some cleanup: indexes become unsigned ints, not unsigned longs, for example. Build and boot on a multicore system, with pcserial enabled. Capture the output. Observe that the messages Initializing CPU #0 Initializing CPU #1 Initializing CPU #2 Initializing CPU #3 appear exactly as they do prior to this change. Change-Id: I5854d8d957c414f75fdd63fb017d2249330f955d Signed-off-by: Ronald G. Minnich <rminnich@chromium.org> Reviewed-on: http://review.coreboot.org/1820 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)		2012-11-13 16:07:45 +01:00
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apic_timer.c	Fix LAPIC timer on Ivy Bridge systems	2012-07-25 01:17:26 +02:00
boot_cpu.c	Add an option to keep the ROM cached after romstage	2012-03-30 01:07:49 +02:00
lapic.c	Since some people disapprove of white space cleanups mixed in regular commits	2010-04-27 06:56:47 +00:00
lapic_cpu_init.c	Pass the CPU index as a parameter to startup.	2012-11-13 16:07:45 +01:00
Makefile.inc	Add an option to keep the ROM cached after romstage	2012-03-30 01:07:49 +02:00
secondary.S	Pass the CPU index as a parameter to startup.	2012-11-13 16:07:45 +01:00