8d2b0dcc44
Rename and update POST_ENTRY_RAMSTAGE postcode value from 0x80 to 0x6f to make the ramstage postcodes appear in an incremental order. Signed-off-by: Subrata Banik <subrata.banik@intel.com> Change-Id: I60f4bd8b2e6b2b887dee7c4991a14ce5d644fdba Reviewed-on: https://review.coreboot.org/c/coreboot/+/52947 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> |
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cbmem_console.h | ||
console.h | ||
debug.h | ||
flash.h | ||
ne2k.h | ||
post_codes.h | ||
qemu_debugcon.h | ||
spi.h | ||
spkmodem.h | ||
streams.h | ||
system76_ec.h | ||
uart.h | ||
usb.h | ||
vtxprintf.h |