Julius Werner baf27dbaeb cbfs: Enable CBFS mcache on most chipsets ... This patch flips the default of CONFIG_NO_CBFS_MCACHE so the feature is enabled by default. Some older chipsets with insufficient SRAM/CAR space still have it explicitly disabled. All others get the new section added to their memlayout... 8K seems like a sane default to start with. Change-Id: I0abd1c813aece6e78fb883f292ce6c9319545c44 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38424 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>		2020-12-02 22:12:10 +00:00
..
acpi
variants
acpi_tables.c	mb/lenovo: Drop unneeded empty lines	2020-09-21 15:57:10 +00:00
blc.c
board_info.txt
bootblock.c
cmos.default
cmos.layout	mb/**/cmos.layout: Indent everything with tabs	2020-11-23 09:56:20 +00:00
cstates.c
devicetree.cb
dock.c	src: Use space after switch, while	2020-08-05 11:36:52 +00:00
dock.h
dsdt.asl	{src/mb,util/autoport}: Use macro for DSDT revision	2020-10-13 18:27:04 +00:00
hda_verb.c
Kconfig	cbfs: Enable CBFS mcache on most chipsets	2020-12-02 22:12:10 +00:00
Kconfig.name
mainboard.c
Makefile.inc
mptable.c
romstage.c
vboot-rwa.fmd