8fda04449f
This is adding complexity to the code more than it saves space, plus some of the tables could potentially be interesting outside of the ChromeOS context. Change-Id: I4bf24608f3e26d3b7871a5031ae8f03bc2c8c21f Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://review.coreboot.org/14070 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
72 lines
1.6 KiB
Text
72 lines
1.6 KiB
Text
#
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# Automatically generated file; DO NOT EDIT.
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# Libpayload Configuration
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#
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#
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# Generic Options
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#
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# CONFIG_LP_GPL is not set
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# CONFIG_LP_EXPERIMENTAL is not set
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# CONFIG_LP_DEVELOPER is not set
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CONFIG_LP_COMPILER_GCC=y
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# CONFIG_LP_COMPILER_LLVM_CLANG is not set
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#
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# Architecture Options
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#
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# CONFIG_LP_ARCH_ARM is not set
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# CONFIG_LP_ARCH_X86 is not set
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CONFIG_LP_ARCH_ARM64=y
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# CONFIG_LP_ARCH_MIPS is not set
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# CONFIG_LP_MEMMAP_RAM_ONLY is not set
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#
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# Standard Libraries
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#
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CONFIG_LP_LIBC=y
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# CONFIG_LP_CURSES is not set
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CONFIG_LP_CBFS=y
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CONFIG_LP_LZMA=y
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#
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# Console Options
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#
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CONFIG_LP_SKIP_CONSOLE_INIT=y
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CONFIG_LP_CBMEM_CONSOLE=y
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# CONFIG_LP_SERIAL_CONSOLE is not set
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CONFIG_LP_VIDEO_CONSOLE=y
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CONFIG_LP_COREBOOT_VIDEO_CONSOLE=y
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# CONFIG_LP_PC_KEYBOARD is not set
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#
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# Drivers
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#
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# CONFIG_LP_RTC_PORT_EXTENDED_VIA is not set
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# CONFIG_LP_STORAGE is not set
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CONFIG_LP_TIMER_NONE=y
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# CONFIG_LP_TIMER_MCT is not set
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# CONFIG_LP_TIMER_TEGRA_1US is not set
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# CONFIG_LP_TIMER_IPQ806X is not set
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# CONFIG_LP_TIMER_RK is not set
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# CONFIG_LP_TIMER_BG4CD is not set
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# CONFIG_LP_TIMER_CYGNUS is not set
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# CONFIG_LP_TIMER_IMG_PISTACHIO is not set
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# CONFIG_LP_TIMER_MTK is not set
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CONFIG_LP_USB=y
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# CONFIG_LP_USB_OHCI is not set
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CONFIG_LP_USB_EHCI=y
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CONFIG_LP_USB_XHCI=y
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# CONFIG_LP_USB_XHCI_MTK_QUIRK is not set
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CONFIG_LP_USB_HID=y
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CONFIG_LP_USB_HUB=y
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# CONFIG_LP_USB_EHCI_HOSTPC_ROOT_HUB_TT is not set
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CONFIG_LP_USB_MSC=y
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CONFIG_LP_USB_GEN_HUB=y
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# CONFIG_LP_USB_PCI is not set
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# CONFIG_LP_UDC is not set
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# CONFIG_LP_BIG_ENDIAN is not set
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CONFIG_LP_LITTLE_ENDIAN=y
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# CONFIG_LP_IO_ADDRESS_SPACE is not set
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CONFIG_LP_ARCH_SPECIFIC_OPTIONS=y
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CONFIG_LP_DMA_LIM_EXCL=0x1000
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