83b05eb0a8
I thought this wasn't going to work, and observing the timC detection failure of early tests, I was getting somewhat discouraged; however, this works. I've tried it with all possible permutations of the following memory modules: * 2 GiB single-rank DDR3-1600 * 4 GiB single-rank DDR3-1600 * 4 GiB dual-rank DDR3-1600 I did notice a limited number of memtest errors during one of the runs, but they were in an address range that is otherwise marked as reserved. I wrote that off as "maybe something was doing MMIO there just when memtest was poking the address range". I was not able to reproduce that error. Change-Id: Ibd52e1d52fc8d900591d6a488f9a5b4d1e5e4fd3 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/8477 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@gmail.com> |
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| .. | ||
| acpi | ||
| acpi_tables.c | ||
| board_info.txt | ||
| chromeos.c | ||
| cmos.default | ||
| cmos.layout | ||
| devicetree.cb | ||
| dsdt.asl | ||
| ec.c | ||
| ec.h | ||
| gpio.c | ||
| hda_verb.c | ||
| Kconfig | ||
| mainboard.c | ||
| mainboard_smi.c | ||
| Makefile.inc | ||
| onboard.h | ||
| romstage.c | ||
| thermal.h | ||