59ae2ef4c4
HDA support did not configure the codecs correclty. Use Intel common block support to configure the codecs. To use common Intel HDA support file hda.c file has been removed and Braswell HDA device ID is added to list of supported PCI devices in intel/common/block/hda/hda.c. CONFIG_SOC_INTEL_COMMON_BLOCK and CONFIG_SOC_INTEL_COMMON_BLOCK_HDA are enabled to include hda.c in build. When codec table is available at board level SOC_INTEL_COMMON_BLOCK_HDA_VERB must be enabled and a codec table must be supplied. BUG=N/A TEST=Facebook FBG-1701 ALC298 configuration Change-Id: I5c23ec311e5b5a6dfd6f031aa19617407fe8ed63 Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-on: https://review.coreboot.org/c/29394 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
72 lines
1.9 KiB
Makefile
72 lines
1.9 KiB
Makefile
ifeq ($(CONFIG_SOC_INTEL_BRASWELL),y)
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subdirs-y += romstage
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subdirs-y += ../../../cpu/x86/lapic
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subdirs-y += ../../../cpu/x86/mtrr
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subdirs-y += ../../../cpu/x86/smm
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subdirs-y += ../../../cpu/x86/tsc
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subdirs-y += ../../../cpu/intel/microcode
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subdirs-y += ../../../cpu/intel/turbo
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subdirs-y += ../../../cpu/intel/common
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romstage-y += gpio_support.c
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romstage-y += iosf.c
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romstage-y += lpc_init.c
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romstage-y += memmap.c
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romstage-y += pmutil.c
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romstage-y += tsc_freq.c
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postcar-y += tsc_freq.c
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ramstage-y += acpi.c
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ramstage-y += chip.c
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ramstage-y += cpu.c
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ramstage-$(CONFIG_ELOG) += elog.c
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ramstage-y += emmc.c
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ramstage-y += gpio.c
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ramstage-y += gfx.c
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ramstage-y += gpio_support.c
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ramstage-y += iosf.c
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ramstage-y += lpe.c
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ramstage-y += lpss.c
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ramstage-y += memmap.c
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ramstage-y += northcluster.c
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ramstage-y += pcie.c
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ramstage-y += pmutil.c
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ramstage-y += ramstage.c
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ramstage-y += sata.c
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ramstage-y += scc.c
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ramstage-y += sd.c
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ramstage-y += smm.c
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ramstage-y += southcluster.c
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ramstage-y += spi.c
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ramstage-y += tsc_freq.c
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ramstage-y += xhci.c
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# Remove as ramstage gets fleshed out
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ramstage-y += placeholders.c
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smm-y += lpc_init.c
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smm-y += pmutil.c
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smm-y += smihandler.c
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smm-y += spi.c
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smm-y += tsc_freq.c
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# cpu_microcode_bins += ???
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CPPFLAGS_common += -I$(src)/soc/intel/braswell/
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CPPFLAGS_common += -I$(src)/soc/intel/braswell/include
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CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp1_1/braswell
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CPPFLAGS_common += -I3rdparty/blobs/mainboard/$(MAINBOARDDIR)
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ifneq ($(CONFIG_VGA_BIOS_FILE),)
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#we will assume that the vbios names will remain as they are now: vgabios.bin and vgabios_c0.bin
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BRASWELL_C0_VBIOS= $(subst .bin,_c0.bin,$(call strip_quotes,$(CONFIG_VGA_BIOS_FILE)))
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cbfs-files-$(CONFIG_VGA_BIOS) += pci8086,22b1.rom
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pci8086,22b1.rom-file := $(BRASWELL_C0_VBIOS)
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pci8086,22b1.rom-type := optionrom
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endif # ifneq ($(CONFIG_VGA_BIOS_FILE),)
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endif # ifeq ($(CONFIG_SOC_INTEL_BRASWELL),y)
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