89989cf61f
Change-Id: I1f44ffeb54955ed660162a791c6281f292b1116a Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31715 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
62 lines
1.6 KiB
C
62 lines
1.6 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2013 Google Inc.
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* Copyright (C) 2015 Intel Corp.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <stdint.h>
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#include <reg_script.h>
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#include <soc/iomap.h>
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#include <soc/iosf.h>
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#include <soc/pci_devs.h>
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#include <soc/pm.h>
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#include <soc/ramstage.h>
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#include <soc/xhci.h>
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#include "chip.h"
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static void xhci_init(struct device *dev)
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{
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struct soc_intel_braswell_config *config = dev->chip_info;
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if (config && config->usb_comp_bg) {
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struct reg_script ops[] = {
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REG_IOSF_WRITE(IOSF_PORT_USBPHY, USBPHY_COMPBG,
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config->usb_comp_bg),
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REG_SCRIPT_END
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};
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printk(BIOS_INFO, "Override USB2_COMPBG to: 0x%X\n",
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config->usb_comp_bg);
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reg_script_run(ops);
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}
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}
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static struct device_operations xhci_device_ops = {
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.read_resources = pci_dev_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.init = xhci_init,
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.ops_pci = &soc_pci_ops,
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};
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static const struct pci_driver soc_xhci __pci_driver = {
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.ops = &xhci_device_ops,
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.vendor = PCI_VENDOR_ID_INTEL,
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.device = XHCI_DEVID
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};
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