coreboot-kgpe-d16/src/soc/intel/braswell
Kyösti Mälkki aa969e887a ACPI: Move PICM declaration
Variable PICM was not inside GNVS region and can use a static
initialisation value.

For most AMD platforms PICM default changes from 1 to 0.

Fix comments about PICM==0 used to indicate use of i8259 PIC for
interrupt delivery.

Change-Id: I525ef8353514ec32941c4d0c37cab38aa320cb20
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49905
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-02-11 16:37:28 +00:00
..
acpi ACPI: Move PICM declaration 2021-02-11 16:37:28 +00:00
bootblock
include/soc sb,soc/intel: Drop OSYS from GNVS 2021-02-11 16:36:15 +00:00
romstage
Kconfig
Makefile.inc
acpi.c soc/intel/baytrail,braswell: Drop TOLM from GNVS 2021-02-02 14:50:38 +00:00
chip.c drivers/intel/fsp1_1,fsp2_0: Refactor logo display 2021-02-09 07:52:31 +00:00
chip.h soc/intel/braswell,skylake: Drop logo parameters from devicetree 2021-02-08 04:57:30 +00:00
cpu.c
elog.c
emmc.c soc/intel: Replace <soc/nvs.h> with <soc/device_nvs.h> 2021-01-03 11:35:51 +00:00
fadt.c
gfx.c
gpio.c
gpio_support.c
iosf.c
lpc_init.c
lpe.c
lpss.c
memmap.c
northcluster.c soc/intel/baytrail,braswell: Drop TOLM from GNVS 2021-02-02 14:50:38 +00:00
pcie.c
placeholders.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
pmutil.c
ramstage.c
sata.c
scc.c
sd.c
smbus.c
smihandler.c
smm.c
southcluster.c
tsc_freq.c
xhci.c