126162c38f
Enable SMBus to support DDR4 SODIMM for brask. Enable 'smbus' in brask device tree and add SPD addressese for the two DIMMs. Separate the Kconfig items of brya and brask. Move HAVE_SPD_IN_CBFS and CHROMEOS_DRAM_PART_NUMBER_IN_CBI to brya and add config SPD_CACHE_IN_FMAP to brask. Add a new section RW_SPD_CACHE to fmd for caching SPD data. The renamed romstage.c is used by both brya and brask and a new function variant_get_spd_info is provided to support the different SPD source types. BUG=b:194055762 BRANCH=None TEST=build pass Change-Id: I41c57a3df127356b8c7e619c4d6144dc73aeac72 Signed-off-by: Alan Huang <alan-huang@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56539 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
22 lines
782 B
Makefile
22 lines
782 B
Makefile
bootblock-y += bootblock.c
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verstage-$(CONFIG_CHROMEOS) += chromeos.c
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romstage-$(CONFIG_CHROMEOS) += chromeos.c
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romstage-y += romstage.c
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ramstage-$(CONFIG_CHROMEOS) += chromeos.c
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ramstage-y += mainboard.c
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ramstage-y += ec.c
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VARIANT_DIR:=$(call strip_quotes,$(CONFIG_VARIANT_DIR))
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BASEBOARD_DIR:=$(call strip_quotes,$(CONFIG_BASEBOARD_DIR))
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subdirs-y += variants/baseboard/$(BASEBOARD_DIR)
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subdirs-y += variants/$(VARIANT_DIR)
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subdirs-y += variants/$(VARIANT_DIR)/memory
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subdirs-$(CONFIG_HAVE_SPD_IN_CBFS) += spd
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CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include
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CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/$(BASEBOARD_DIR)/include
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CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include
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