coreboot-kgpe-d16/src/mainboard/google/brya
Kyösti Mälkki 91c077f6e2 ChromeOS: Fix <vc/google/chromeos/chromeos.h>
Change-Id: Ibbdd589119bbccd3516737c8ee9f90c4bef17c1e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58923
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-11-09 00:14:46 +00:00
..
spd mb/google/brya: Migrate brya to use SPD files under spd/ 2021-09-23 06:22:27 +00:00
variants ChromeOS: Fix <vc/google/chromeos/chromeos.h> 2021-11-09 00:14:46 +00:00
board_info.txt
bootblock.c mb/{google, intel}: Make use of `cpu/intel/cpu_ids.h' 2021-07-19 18:25:42 +00:00
chromeos.c mb/google,intel: Fix indirect include bootmode.h 2021-11-05 15:39:54 +00:00
chromeos.fmd mb/google/brya: Set same size for CSE_RW, ME_RW_A and ME_RW_B 2021-10-19 16:10:02 +00:00
dsdt.asl mb/google/brya: Add WWAN poweroff sequence 2021-09-17 19:51:19 +00:00
ec.c
Kconfig mb/google/brya: Enable DDR4 SODIMM for brask 2021-10-04 18:41:03 +00:00
Kconfig.name mb/google/brya: Enable DRIVERS_GENESYSLOGIC_GL9755 for brask 2021-11-01 15:53:36 +00:00
mainboard.asl mb/google/brya: Implement SLP_S0_GATE signal 2021-03-18 22:31:36 +00:00
mainboard.c mb/goog/brya: Add probed fw_configs to SMBIOS OEM strings 2021-09-01 19:32:43 +00:00
Makefile.inc mb/google/brya: Enable DDR4 SODIMM for brask 2021-10-04 18:41:03 +00:00
romstage.c mb/google/brya: Enable DDR4 SODIMM for brask 2021-10-04 18:41:03 +00:00
smihandler.c
wwan_power.asl mb/google/brya: Add WWAN poweroff sequence 2021-09-17 19:51:19 +00:00