0aa37c488b
The name lapic_cluster is a bit misleading, since the construct is not local APIC specific by concept. As implementations and hardware change, be more generic about our naming. This will allow us to support non-x86 systems without adding new keywords. Change-Id: Icd7f5fcf6f54d242eabb5e14ee151eec8d6cceb1 Signed-off-by: Stefan Reinauer <reinauer@google.com> Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2377 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
101 lines
3 KiB
Text
101 lines
3 KiB
Text
##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2012 Ricardo Martins <rasmartins@gmail.com>
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##
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## This program is free software; you can redistribute it and/or
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## modify it under the terms of the GNU General Public License as
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## published by the Free Software Foundation; version 2 of
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## the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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## MA 02110-1301 USA
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##
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chip northbridge/amd/lx
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device domain 0 on
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device pci 1.0 on end # Northbridge
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device pci 1.1 on end # Video Adapter
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device pci 1.2 on end # AES Security Block
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chip southbridge/amd/cs5536
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register "lpc_serirq_enable" = "0x0000115a"
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register "lpc_serirq_polarity" = "0x0000eea5"
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register "lpc_serirq_mode" = "1"
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register "enable_gpio_int_route" = "0x0d0c0700"
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register "enable_ide_nand_flash" = "0"
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register "enable_USBP4_device" = "0" # 0:host, 1:device
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register "enable_USBP4_overcurrent" = "0"
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register "com1_enable" = "1" # CN10 (RS422/486 COM3)
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register "com1_address" = "0x3e8"
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register "com1_irq" = "5"
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register "com2_enable" = "0"
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register "unwanted_vpci[0]" = "0" # End of list has a zero
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device pci e.0 on end # RTL8100C
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device pci f.0 on # ISA Bridge
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chip superio/winbond/w83627ehg # Winbond W83627EHG
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device pnp 2e.0 on # Floppy
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io 0x60 = 0x3f0
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irq 0x70 = 6
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drq 0x74 = 2
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end
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device pnp 2e.1 on # Parallel port
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io 0x60 = 0x378
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irq 0x70 = 7
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drq 0x74 = 3
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end
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device pnp 2e.2 on # COM1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 2e.3 on # COM2
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io 0x60 = 0x2f8
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irq 0x70 = 3
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end
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device pnp 2e.5 on # PS/2 keyboard/mouse
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io 0x60 = 0x60
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io 0x62 = 0x64
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irq 0x70 = 1 # Keyboard
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irq 0x72 = 12 # Mouse
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end
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device pnp 2e.b on # HW Monitor
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io 0x60 = 0x290
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irq 0x70 = 0
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end
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device pnp 2e.6 off end # Serial Flash Interface
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device pnp 2e.7 off end # GPIO1, GPIO6, Game Port & MIDI Port
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device pnp 2e.8 off end # WDTO# & PLED
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device pnp 2e.9 off end # GPIO2,GPIO3, GPIO4, GPIO5 & SUSLED
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device pnp 2e.a off end # ACPI
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device pnp 2e.106 off end #
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device pnp 2e.107 off end #
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device pnp 2e.207 off end #
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end
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end
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device pci f.2 on end # IDE Controller
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device pci f.3 off end # Audio (N/A)
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device pci f.4 on end # OHCI
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device pci f.5 on end # EHCI
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end
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end
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# APIC cluster is late CPU init.
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device cpu_cluster 0 on
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chip cpu/amd/geode_lx
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device lapic 0 on end
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end
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end
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end
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