coreboot-kgpe-d16/src
Ravi Sarawadi 92b487dd4b soc/intel/apollolake: select NO_UART_ON_SUPERIO
If not, legacy COM ports will be enumerated by kernel and console will
not work.

localhost ~ # cat /proc/tty/driver/serial
serinfo:1.0 driver revision:
0: uart:16550A port:000003F8 irq:4 tx:0 rx:0
1: uart:16550A mmio:0xC112D000 irq:4 tx:764 rx:0 RTS|DTR
2: uart:16550A mmio:0xC112F000 irq:6 tx:0 rx:0
3: uart:unknown port:000002E8 irq:3

With this fix:
0: uart:16550A mmio:0xC112D000 irq:4 tx:0 rx:0
1: uart:16550A mmio:0xC112F000 irq:6 tx:858 rx:42 RTS|DTR
2: uart:unknown port:000003E8 irq:4
3: uart:unknown port:000002E8 irq:3

Change-Id: Iac5bf65900e090d4e785e0cd828272ebff209458
Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.com>
Reviewed-on: https://review.coreboot.org/23219
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-01-26 22:40:28 +00:00
..
acpi arch/x86: Add common AMD ACPI hardware definitions 2017-11-10 19:15:38 +00:00
arch smbios: handle DIMM of 32G or more 2018-01-26 17:27:51 +00:00
commonlib commonlib/region: expose subregion helper function 2017-12-15 23:35:05 +00:00
console console: Ignore loglevel in nvram until ramstage 2017-09-25 13:35:29 +00:00
cpu cpu/x86: don't utilize UDELAY_IO if GENERIC_UDELAY 2018-01-25 22:36:46 +00:00
device sconfig: Add a new mmio resource type 2018-01-25 16:50:17 +00:00
drivers drivers/i2c/designware: reduce API complication for bus config 2018-01-25 22:36:30 +00:00
ec ec/google/chromeec: Add _PRW property to CREC device 2018-01-26 17:29:31 +00:00
include sconfig: Add a new mmio resource type 2018-01-25 16:50:17 +00:00
lib lib: include timer.c for all stages for GENERIC_UDELAY 2018-01-25 22:36:39 +00:00
mainboard mb/*/*/cmos.layout: Fix the values for the console level 2018-01-26 17:28:56 +00:00
northbridge nb/intel/sandybridge: Use common mrc cache functions 2018-01-26 21:35:24 +00:00
security security/tpm: Move TSS stacks into sub-directory 2018-01-18 02:17:34 +00:00
soc soc/intel/apollolake: select NO_UART_ON_SUPERIO 2018-01-26 22:40:28 +00:00
southbridge AGESA f15 cimx/sb700: Remove unused chips code 2018-01-24 02:09:18 +00:00
superio Intel i3100 boards & chips: Remove - using LATE_CBMEM_INIT 2018-01-15 23:25:12 +00:00
vendorcode AGESA f15 cimx/sb700: Remove vendorcode source 2018-01-24 02:11:04 +00:00
Kconfig util/blobtool: rename to bincfg 2018-01-18 13:47:20 +00:00