coreboot-kgpe-d16/src
Boris Mittelberg 93df61f3a9 mb/google/brya: Change EC -> PCH wake pin to GPP_F17
A new schematic revision indicates that the old wake pin is not used,
and brya will only use 1 IRQ pin from EC, routed to GPP_F17

BUG=b:178605367
TEST=Build test

Signed-off-by: Boris Mittelberg <bmbm@google.com>
Change-Id: Ia2bc5b1562ab30b4461fc7e3b1a4bc3e370db588
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50084
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-02-01 08:48:25 +00:00
..
acpi ACPI: Do minor improvements on GNVS 2021-01-29 10:21:25 +00:00
arch stage_cache: Add resume_from_stage_cache() 2021-01-29 10:53:33 +00:00
commonlib
console
cpu soc/intel/*: Get rid of custom microcode caching 2021-02-01 08:46:30 +00:00
device device/oprom/include/x86emu/fpu_regs.h: Fix lint error 2021-02-01 08:46:11 +00:00
drivers ipmi/ocp: Move common OCP/Facebook IPMI OEM codes into drivers/ipmi/ocp 2021-02-01 08:47:48 +00:00
ec ec/google/wilco: Convert to ASL 2.0 syntax 2021-01-24 21:51:39 +00:00
include device: Drop mmconf_resource_init function 2021-01-30 23:13:22 +00:00
lib stage_cache: Add resume_from_stage_cache() 2021-01-29 10:53:33 +00:00
mainboard mb/google/brya: Change EC -> PCH wake pin to GPP_F17 2021-02-01 08:48:25 +00:00
northbridge nb/intel/i945: Define and use MMCONF_BUS_NUMBER 2021-01-30 23:13:05 +00:00
security soc/intel: Replace SA_PCIEX_LENGTH Kconfig options 2021-01-30 23:14:08 +00:00
soc soc/amd/stoneyridge/acpi: Convert to ASL 2.0 syntax 2021-02-01 08:47:17 +00:00
southbridge sb/intel/ibexpeak: Drop invalid ME finalisation function 2021-01-30 23:25:02 +00:00
superio superio/nuvoton/common/Kconfig: Remove HWM config 2021-01-29 09:39:43 +00:00
vendorcode vc/google/chromeos/Kconfig: Remove unused NO_TPM_RESUME 2021-01-29 09:40:19 +00:00
Kconfig