Furquan Shaikh 94f8699d44 spi: Define and use spi_ctrlr structure ... 1. Define a new structure spi_ctrlr that allows platforms to define callbacks for spi operations (claim bus, release bus, transfer). 2. Add a new member (pointer to spi_ctrlr structure) in spi_slave structure which will be initialized by call to spi_setup_slave. 3. Define spi_claim_bus, spi_release_bus and spi_xfer in spi-generic.c which will make appropriate calls to ctrlr functions. BUG=chrome-os-partner:59832 BRANCH=None TEST=Compiles successfully Change-Id: Icb2326e3aab1e8f4bef53f553f82b3836358c55e Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/17684 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2016-12-05 03:29:04 +01:00
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broadcom/cygnus	spi: Define and use spi_ctrlr structure	2016-12-05 03:29:04 +01:00
dmp/vortex86ex
imgtec/pistachio	spi: Define and use spi_ctrlr structure	2016-12-05 03:29:04 +01:00
intel	spi: Define and use spi_ctrlr structure	2016-12-05 03:29:04 +01:00
lowrisc/lowrisc	riscv: add the lowrisc System On Chip support	2016-10-25 22:31:06 +02:00
marvell	spi: Define and use spi_ctrlr structure	2016-12-05 03:29:04 +01:00
mediatek/mt8173	spi: Define and use spi_ctrlr structure	2016-12-05 03:29:04 +01:00
nvidia	spi: Define and use spi_ctrlr structure	2016-12-05 03:29:04 +01:00
qualcomm	spi: Define and use spi_ctrlr structure	2016-12-05 03:29:04 +01:00
rdc/r8610
rockchip	spi: Define and use spi_ctrlr structure	2016-12-05 03:29:04 +01:00
samsung	spi: Define and use spi_ctrlr structure	2016-12-05 03:29:04 +01:00
ucb/riscv	soc/ucb/riscv: select BOOTBLOCK_CONSOLE	2016-08-15 18:24:42 +02:00