b0c4cbb7af
1. Add IGD opregion initialization. 2. Use frame buffer return by FSP for display. 3. Derived from "src/soc/intel/apollolake/graphics.c" with changes needed for CNL. TEST=Pre-OS screen comes up and VBT is getting passed to kernel. Change-Id: I19c0cf6cfc03fc9df9e98c75af4e486cb5a19e32 Signed-off-by: Abhay Kumar <abhay.kumar@intel.com> Reviewed-on: https://review.coreboot.org/21999 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
73 lines
1.8 KiB
Makefile
73 lines
1.8 KiB
Makefile
ifeq ($(CONFIG_SOC_INTEL_CANNONLAKE),y)
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subdirs-y += romstage
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subdirs-y += ../../../cpu/intel/microcode
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subdirs-y += ../../../cpu/intel/turbo
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subdirs-y += ../../../cpu/x86/lapic
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subdirs-y += ../../../cpu/x86/mtrr
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subdirs-y += ../../../cpu/x86/smm
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subdirs-y += ../../../cpu/x86/tsc
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bootblock-y += bootblock/bootblock.c
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bootblock-y += bootblock/cpu.c
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bootblock-y += bootblock/pch.c
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bootblock-y += pmutil.c
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bootblock-y += bootblock/report_platform.c
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bootblock-y += gpio.c
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bootblock-y += gspi.c
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bootblock-y += memmap.c
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bootblock-y += spi.c
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bootblock-$(CONFIG_UART_DEBUG) += uart.c
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romstage-y += gpio.c
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romstage-y += gspi.c
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romstage-y += memmap.c
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romstage-y += pmutil.c
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romstage-y += reset.c
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romstage-y += spi.c
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romstage-$(CONFIG_UART_DEBUG) += uart.c
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ramstage-y += acpi.c
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ramstage-y += chip.c
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ramstage-y += cpu.c
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ramstage-y += finalize.c
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ramstage-y += gpio.c
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ramstage-y += graphics.c
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ramstage-y += gspi.c
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ramstage-y += gpio.c
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ramstage-y += lpc.c
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ramstage-y += memmap.c
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ramstage-y += pmc.c
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ramstage-y += pmutil.c
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ramstage-$(CONFIG_PLATFORM_USES_FSP2_0) += reset.c
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ramstage-y += smmrelocate.c
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ramstage-y += spi.c
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ramstage-y += systemagent.c
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ramstage-$(CONFIG_UART_DEBUG) += uart.c
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ramstage-$(CONFIG_UART_DEBUG) += uart_pch.c
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ramstage-y += vr_config.c
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smm-y += gpio.c
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smm-y += pmutil.c
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smm-y += smihandler.c
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smm-$(CONFIG_SPI_FLASH_SMM) += spi.c
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smm-$(CONFIG_UART_DEBUG) += uart.c
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smm-$(CONFIG_UART_DEBUG) += uart_pch.c
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postcar-y += memmap.c
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postcar-y += pmutil.c
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postcar-y += spi.c
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postcar-$(CONFIG_UART_DEBUG) += uart.c
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verstage-y += gspi.c
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verstage-y += pmutil.c
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verstage-y += spi.c
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verstage-$(CONFIG_UART_DEBUG) += uart.c
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CPPFLAGS_common += -I$(src)/soc/intel/cannonlake/include/fsp20
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CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/cannonlake
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CPPFLAGS_common += -I$(src)/soc/intel/cannonlake
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CPPFLAGS_common += -I$(src)/soc/intel/cannonlake/include
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endif
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