Shaunak Saha 95b61752db soc/intel/cannonlake: Add support for C state and P state ... This patch adds the C state and P state configurations for cannonlake soc. TEST = Boot and test the CPU states for all the cores are present in "powertop" tool output. Change-Id: I4ba156354f87646b25d0f9114ebf0583eedf72df Signed-off-by: Shaunak Saha <shaunak.saha@intel.com> Reviewed-on: https://review.coreboot.org/21891 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2017-10-26 15:55:37 +00:00
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acpi	soc/intel/cannonlake: Add platform.asl	2017-10-20 20:52:46 +00:00
bootblock	soc/intel/cannonlake: Fix HECI error on reset	2017-10-19 19:48:43 +00:00
include/soc	soc/intel/cannonlake: Add support for C state and P state	2017-10-26 15:55:37 +00:00
romstage	soc/intel/cannonlake: remove duplicate power_state migration	2017-10-26 15:54:19 +00:00
acpi.c	soc/intel/cannonlake: Add support for C state and P state	2017-10-26 15:55:37 +00:00
cbmem.c
chip.c	soc/intel/cannonlake: Add support for C state and P state	2017-10-26 15:55:37 +00:00
chip.h	soc/intel/cannonlake: Set platform Debug Probe Type	2017-10-18 19:56:09 +00:00
cpu.c	soc/intel/cannonlake: Fill the SMI usage	2017-10-03 20:23:41 +00:00
finalize.c	soc/intel/cannonlake: Add finalize function	2017-10-18 17:52:11 +00:00
gpio.c	soc/intel/cannonlake: Add PMC pci drivers	2017-09-20 01:22:18 +00:00
graphics.c	soc/intel/cannonlake: Add IGD Support and pre-OS display code	2017-10-19 15:19:36 +00:00
gspi.c	soc/intel/cannonlake: Add SPI flash controller driver	2017-08-17 21:50:58 +00:00
Kconfig	soc/intel/cannonlake: Increase stack size from 4KiB to 8KiB	2017-10-23 16:40:01 +00:00
lockdown.c	soc/intel/cannonlake: Add finalize function	2017-10-18 17:52:11 +00:00
lpc.c	soc/intel/cannonlake: Add lpc pci driver	2017-10-03 20:23:32 +00:00
Makefile.inc	soc/intel/cannonlake: Add IGD Support and pre-OS display code	2017-10-19 15:19:36 +00:00
memmap.c	soc/intel/cannonlake: Use EBDA structure to store soc reserve memory size	2017-10-19 17:36:16 +00:00
pmc.c	security/vboot: Move vboot2 to security kconfig section	2017-10-22 02:14:46 +00:00
pmutil.c	security/vboot: Move vboot2 to security kconfig section	2017-10-22 02:14:46 +00:00
reset.c	soc/intel/cannonlake: Fix HECI error on reset	2017-10-19 19:48:43 +00:00
smihandler.c	soc/intel/cannonlake: Fill the SMI usage	2017-10-03 20:23:41 +00:00
smmrelocate.c	soc/intel/cannonlake: Fill the SMI usage	2017-10-03 20:23:41 +00:00
spi.c	soc/intel/cannonlake: Add SPI flash controller driver	2017-08-17 21:50:58 +00:00
systemagent.c	soc/intel/cannonlake: Add ramstage SystemAgent support	2017-08-09 20:06:27 +00:00
uart.c	soc/intel/cannonlake: Add support for all UART port index	2017-08-21 16:30:24 +00:00
uart_pch.c	soc/intel/cannonlake: Add ramstage uart debug support	2017-09-13 17:25:02 +00:00
vr_config.c	soc/intel/cannonlake: Init UPD params based on config	2017-08-25 18:24:33 +00:00