WANG Siyuan a9b01d1347 AMD f16kb: use AZ_PIN in Kconfig to customize AZALIA_PIN in Yangtze ... src/southbridge/amd/agesa/hudson/Kconfig config default value, mainboard Kconfig config value for specific mainboard. bit 1,0 - pin 0 bit 3,2 - pin 1 bit 5,4 - pin 2 bit 7,6 - pin 3 Change-Id: I54a87cf734685515a3e1850838ca7d94387172ce Signed-off-by: WANG Siyuan <SiYuan.Wang@amd.com> Signed-off-by: WANG Siyuan <wangsiyuanbuaa@gmail.com> Reviewed-on: http://review.coreboot.org/3879 Tested-by: build bot (Jenkins) Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>		2013-08-27 19:08:20 +02:00
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amd	AMD f16kb: use AZ_PIN in Kconfig to customize AZALIA_PIN in Yangtze	2013-08-27 19:08:20 +02:00
google	Correct spelling of shadow, setting and memory	2013-08-16 22:25:56 +02:00
Kconfig	Add Google ChromeOS vendorcode directory	2012-03-30 01:59:38 +02:00
Makefile.inc	Add Google ChromeOS vendor support	2012-04-02 18:39:31 +02:00