coreboot-kgpe-d16/src/soc/sifive/fu540
Philipp Hug 968a23d2e0 riscv: fix non-SMP support
Use CONFIG_CPU_MAX which defaults to 1 instead of CONFIG_RISCV_HART_NUM.
The default value of CONFIG_RISCV_HART_NUM was 0 and cause a jump to address 0.
Add a die() call to fail gracefully.

Change-Id: I4e3aa09b787ae0f26a4aae375f4e5fcd745a0a1e
Signed-off-by: Philipp Hug <philipp@hug.cx>
Reviewed-on: https://review.coreboot.org/c/29993
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Xiang Wang <wxjstz@126.com>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
2018-12-07 11:37:53 +00:00
..
include/soc soc/sifive/fu540: Add helper function to get tlclk frequency 2018-12-05 13:36:43 +00:00
bootblock.c
cbmem.c sifive/fu540: correct cbmem support 2018-10-30 02:07:12 +00:00
clint.c riscv: add support smp_pause / smp_resume 2018-11-05 09:03:40 +00:00
clock.c soc/sifive/fu540: Add helper function to get tlclk frequency 2018-12-05 13:36:43 +00:00
ddrregs.h soc/sifive/fu540: add SiFive supplied header files for SDRAM initialization 2018-09-14 09:27:29 +00:00
Kconfig riscv: fix non-SMP support 2018-12-07 11:37:53 +00:00
Makefile.inc soc/sifive/fu540: Simplify UART refclk calculation 2018-12-03 13:18:04 +00:00
media.c
otp.c soc/sifive: fix compiler warning 2018-09-10 20:37:17 +00:00
regconfig-ctl.h soc/sifive/fu540: add SiFive supplied header files for SDRAM initialization 2018-09-14 09:27:29 +00:00
regconfig-phy.h soc/sifive/fu540: add SiFive supplied header files for SDRAM initialization 2018-09-14 09:27:29 +00:00
sdram.c soc/sifive/fu540: Remove PLL parameters from sdram.c 2018-09-26 18:52:27 +00:00
uart.c soc/sifive/fu540: Add helper function to get tlclk frequency 2018-12-05 13:36:43 +00:00
ux00ddr.h soc/sifive/fu540: Initialize SDRAM 2018-09-14 10:32:20 +00:00