coreboot-kgpe-d16/src
Rex-BC Chen 978930e860 soc/mediatek/mt8186: Update PWRAP arbiter enable bit
There is no wakeup source when we test function of suspend and resume.
The root cause is that the monitor enable bit of PWRAP is not configured
correctly.

BUG=b:213255218, b:214978483
TEST=receive wakeup source from MT6366 successfully

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I324d18fa5d3cd745c35fcf0f207e1b444b5e898b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61330
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-01-26 02:56:05 +00:00
..
acpi src: Remove unused <stdbool> 2022-01-19 15:15:50 +00:00
arch arch/riscv: Fix some SMP related headers 2022-01-19 19:29:42 +00:00
commonlib commonlib: Add new "CSME ROM started execution" TS 2022-01-21 22:43:30 +00:00
console lib/cbmem_console,console: Resurrect CONSOLE_CBMEM_DUMP_TO_UART 2022-01-25 16:13:39 +00:00
cpu cpu/x86/mp_init.c: Make it work for !CONFIG_SMP 2021-12-10 15:57:34 +00:00
device device: constify pciexp_find_extended_cap() 2022-01-24 17:28:39 +00:00
drivers drivers/intel/fsp2_0: Make FSP Notify Phase APIs optional 2022-01-25 16:13:04 +00:00
ec ec/google/chromeec: Add checks before creating Type C device 2022-01-25 03:52:00 +00:00
include soc/intel/common: Include Alder Lake-N device IDs 2022-01-25 16:10:46 +00:00
lib lib/cbmem_console,console: Resurrect CONSOLE_CBMEM_DUMP_TO_UART 2022-01-25 16:13:39 +00:00
mainboard mb/google/guybrush/var/nipperkin: Add Board values for eDP tuning 2022-01-25 23:57:13 +00:00
northbridge northbridge/intel/i945: Change types to uintptr_t where appropriate 2022-01-25 16:14:23 +00:00
security console/cbmem_console: Rename cbmem_dump_console 2022-01-13 15:25:43 +00:00
soc soc/mediatek/mt8186: Update PWRAP arbiter enable bit 2022-01-26 02:56:05 +00:00
southbridge sb/intel/common/firmware: Reword me_cleaner warning 2022-01-17 17:14:20 +00:00
superio superio/smsc/sch5545/superio.c: Include stdint.h and bsd/helpers.h 2022-01-10 23:28:32 +00:00
vendorcode soc/amd/cezanne: FSP: Add UPD entry for eDP tuning 2022-01-25 23:57:06 +00:00
Kconfig Kconfig: Show console DEBUG_FUNC if OVERRIDE_LOGLEVEL is set 2021-11-13 00:20:11 +00:00