coreboot-kgpe-d16/src/mainboard/amd/norwich
Stefan Reinauer 9839cbd53f * clean up all but two warnings on artecgroup dbe61
* integrate vsm init into normal x86.c code (so it can run above 1M)
* call void main(unsigned long bist) except void cache_as_ram_main(void)
  on Geode LX (as we do on almost all other platforms now)
* Unify Geode LX MSR setup (will bring most non-working LX targets back
  to life)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5471 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-04-21 20:06:10 +00:00
..
chip.h Carl-Daniel's part: 2009-02-18 20:41:57 +00:00
cmos.layout Replace dual_core and quad_core CMOS (nvram) options with multi_core. Fix some white space. 2010-04-08 15:06:44 +00:00
devicetree.cb Kconfig! 2009-08-12 15:00:51 +00:00
irq_tables.c Major CONFIG_IRQ_TABLE_COUNT fixing and cleanups. Some of these boards 2009-10-07 21:51:33 +00:00
Kconfig Move CAR settings for all GX1, GX2, LX and Intel Slot2 boards to the CPU. 2010-02-04 01:32:43 +00:00
mainboard.c printk_foo -> printk(BIOS_FOO, ...) 2010-03-22 11:42:32 +00:00
romstage.c * clean up all but two warnings on artecgroup dbe61 2010-04-21 20:06:10 +00:00