coreboot-kgpe-d16/src/vendorcode
Srinidhi N Kaushik 9a768be0a5 vendorcode/intel/fsp/fsp2_0/tgl: Update FSP header for Tiger Lake
Update FSPM header to add Vtd related Upds for Tiger Lake platform
version 2457.

Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Change-Id: I063f921832a4e4a45eb6978b6dbb37b1ac7dde7f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39168
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: caveh jalali <caveh@chromium.org>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
2020-03-03 10:19:39 +00:00
..
amd mb/pcengines/apu2: use AGESA 1.0.0.4 with adjusted AGESA header 2020-02-06 09:21:48 +00:00
cavium dram-spd: Remove free() 2019-12-27 16:08:40 +00:00
eltan vboot: remove use of NEED_VB20_INTERNALS switch 2020-02-19 12:08:12 +00:00
google vboot: remove rogue vboot_struct.h include 2020-02-24 12:47:55 +00:00
intel vendorcode/intel/fsp/fsp2_0/tgl: Update FSP header for Tiger Lake 2020-03-03 10:19:39 +00:00
siemens vendorcode/siemens/hwilib: Fix current file string usage 2019-11-29 09:03:41 +00:00
Makefile.inc vendorcode/eltan: Add vendor code for measured and verified boot 2019-06-04 10:41:53 +00:00