coreboot-kgpe-d16/src
Damien Zammit 9ae0985328 nb/intel/x4x: Fix underclocking of 800MHz DDR2 RAM
Previously, any 800MHz DIMMs were being slowed to 667MHz
for no reason other than there was a bug in the maximum
frequency detection code for the MCH.

Change-Id: Id6c6c88c4a40631f6caf52f536a939a43cb3faf1
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: https://review.coreboot.org/15257
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2016-07-09 13:49:00 +02:00
..
acpi
arch acpi: Change device properties to work as a tree 2016-07-08 17:21:26 +02:00
commonlib region: Add writeat and eraseat support 2016-06-24 20:48:12 +02:00
console console/post: be explicit about conditional cmos_post_log() compiling 2016-05-25 18:04:11 +02:00
cpu AMD k8 fam10: Refactor S3 recovery 2016-06-29 07:33:58 +02:00
device device: i2c: Add support for I2C bus operations 2016-06-09 17:05:40 +02:00
drivers drivers/i2c/da7219: Add driver for generating device in SSDT 2016-07-08 17:22:16 +02:00
ec ec/google: Add support for the EC 'get time' function 2016-06-24 20:22:52 +02:00
include lib/gpio: add pullup & pulldown gpio_base2_value() variants 2016-07-07 20:44:36 +02:00
lib lib/gpio: add pullup & pulldown gpio_base2_value() variants 2016-07-07 20:44:36 +02:00
mainboard soc/intel/quark: Pass in the memory initialization parameters 2016-07-08 17:59:20 +02:00
northbridge nb/intel/x4x: Fix underclocking of 800MHz DDR2 RAM 2016-07-09 13:49:00 +02:00
soc soc/intel/quark: Pass in the memory initialization parameters 2016-07-08 17:59:20 +02:00
southbridge PCI: Use PCI_DEVFN macro instead of DEV_FUNC 2016-07-06 21:58:09 +02:00
superio sio/winbond/w83667hg-a: Add pinmux defines for UART B 2016-05-29 19:34:54 +02:00
vendorcode soc/intel/quark: Pass in the memory initialization parameters 2016-07-08 17:59:20 +02:00
Kconfig Kconfig: Show DEBUG_BOOT_STATE in the Debug menu 2016-07-01 21:33:36 +02:00