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Eric Lai 9f9d5106c5 soc/intel/common/gpio: Add PAD_NC_LOCK and PAD_CFG_GPI_SCI_LOCK macro
Add PAD_NC_LOCK and PAD_CFG_GPI_SCI_LOCK macro to support mainboard
to lock NC and GPI_SCI pins as applicable.

BUG=b:216583542
TEST=build passed

Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: Ie44d72f4152b55183d900228df3e3670358f7518
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61655
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-02-09 23:23:31 +00:00
3rdparty 3rdparty/amd_blobs: advance submodule pointer 2022-02-01 20:28:53 +00:00
Documentation Documentation/releases: Add 4.17 release notes template 2022-02-03 17:17:25 +00:00
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configs configs/i440fx: Build-test PARALLEL_MP 2022-02-07 13:48:05 +00:00
payloads libpayload: Refer to vboot source consistently 2022-01-28 14:47:38 +00:00
spd spd: Add new LP5 part Samsung K3LKBKB0BM-MGCP 2022-02-03 14:47:49 +00:00
src soc/intel/common/gpio: Add PAD_NC_LOCK and PAD_CFG_GPI_SCI_LOCK macro 2022-02-09 23:23:31 +00:00
tests tests: Fix tests code and comments style 2022-01-14 14:29:29 +00:00
util util/ifdtool: add generic `PLATFORM_IFD2` for early SoC development 2022-02-09 14:19:47 +00:00
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Makefile.inc IASL: Ignore IASL's "Missing dependency" warning 2022-01-28 16:34:23 +00:00
README.md
gnat.adc
toolchain.inc

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.