coreboot-kgpe-d16/src/southbridge
Kyösti Mälkki a244d5edd4 sb/amd/{agesa,pi}/hudson: Explicitly enable LPC controller
Location in hudson_lpc_port80() was called conditionally.
Also move hudson_lpc_decode() call after enable_acpimmio_decode_pmXX()
due the change from IO to MMIO using pm_read/write.

Change-Id: I38e94e4b04f0a493052cfd3ffdd0a9c2ac0d07fc
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37595
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
2019-12-10 11:17:40 +00:00
..
amd sb/amd/{agesa,pi}/hudson: Explicitly enable LPC controller 2019-12-10 11:17:40 +00:00
intel src/: Remove g_ prefixes and _g suffixes from variables 2019-12-02 10:44:38 +00:00
ricoh/rl5c476 src/southbridge: change "unsigned" to "unsigned int" 2019-10-30 11:16:56 +00:00
ti src/southbridge: change "unsigned" to "unsigned int" 2019-10-30 11:16:56 +00:00