Duncan Laurie a2d6a40480 lynxpoint: Fix LP clock gating setup for LPC ... This bit offset is incorrect and should only be set based on another bit in a different register. Change-Id: I6037534236e3a4a5d15e15011ed9b5040b435eaf Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/2973 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>		2013-04-01 23:27:21 +02:00
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arch	x86: Drop BOARD_HAS_FADT	2013-03-30 19:33:49 +01:00
console	console: Make use of CONFIG_USE_OPTION_TABLE	2013-04-01 20:54:48 +02:00
cpu	Minor Kconfig help text fix	2013-04-01 23:27:07 +02:00
device	pci: don't load vga option rom before S3 check	2013-04-01 20:55:56 +02:00
drivers	x86: Unify arch/io.h and arch/romcc_io.h	2013-03-22 00:00:09 +01:00
ec	x86: Unify arch/io.h and arch/romcc_io.h	2013-03-22 00:00:09 +01:00
include	memrange: add 2 new range_entry routines	2013-03-29 20:11:28 +01:00
lib	memrange: add 2 new range_entry routines	2013-03-29 20:11:28 +01:00
mainboard	ASRock E350M1: mptable.c: Remove unused variable `dev`	2013-04-01 21:07:46 +02:00
northbridge	sandybridge: add option to mark graphics memory write-combining.	2013-03-29 20:00:39 +01:00
southbridge	lynxpoint: Fix LP clock gating setup for LPC	2013-04-01 23:27:21 +02:00
superio	Winbond W83627HF: Rename and move ASL snippet to `acpi/superio.asl`	2013-04-01 21:09:24 +02:00
vendorcode	chromeos: honor MOCK_TPM=1	2013-04-01 23:26:17 +02:00
Kconfig	dynamic cbmem: fix memconsole and timestamps	2013-03-23 19:44:25 +01:00