coreboot-kgpe-d16/src/southbridge
Duncan Laurie a2d6a40480 lynxpoint: Fix LP clock gating setup for LPC
This bit offset is incorrect and should only be set based
on another bit in a different register.

Change-Id: I6037534236e3a4a5d15e15011ed9b5040b435eaf
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/2973
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-04-01 23:27:21 +02:00
..
amd AMD hudson & SB800 - Fix issues with mawk 2013-04-01 20:52:31 +02:00
broadcom x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
intel lynxpoint: Fix LP clock gating setup for LPC 2013-04-01 23:27:21 +02:00
nvidia x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
rdc x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
ricoh GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
sis x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
ti GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
via x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
Kconfig Add support for RDC R8610 Southbridge 2012-03-27 18:39:05 +02:00
Makefile.inc Add support for RDC R8610 Southbridge 2012-03-27 18:39:05 +02:00