coreboot-kgpe-d16/src/northbridge/intel/sandybridge
Antonello Dettori 6fc430b3eb northbridge/intel/sandybridge: transition away from device_t
Replace the use of the old device_t definition inside
northbridge/intel/sandybridge.

The patch has been tested both with the arch/io.h definition of device_t
enabled and disabled in order to ensure compatibility while the
transaction takes place.

Change-Id: I35cc76ec7b6baa216666d06f6f325f43ac69067e
Signed-off-by: Antonello Dettori <dev@dettori.io>
Reviewed-on: https://review.coreboot.org/16409
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-04 05:48:44 +02:00
..
acpi
acpi.c
bootblock.c
chip.h nb/intel/raminit (native): Read PCI mmio size from devicetree 2016-06-12 12:48:44 +02:00
early_init.c Move definitions of HIGH_MEMORY_SAVE 2016-06-17 00:19:08 +02:00
finalize.c
gma.c
gma.h sandybridge/gma_lvds: support both Sandy&Ivy on one board 2016-03-05 09:39:41 +01:00
gma_ivybridge_lvds.c sandybridge/gma_lvds: support both Sandy&Ivy on one board 2016-03-05 09:39:41 +01:00
gma_sandybridge_lvds.c sandybridge/gma_lvds: support both Sandy&Ivy on one board 2016-03-05 09:39:41 +01:00
iommu.c
Kconfig intel sandy/ivy: Redefine DCACHE_RAM_SIZE and DCACHE_RAM_MRC_VAR_SIZE 2016-07-26 07:09:24 +02:00
Makefile.inc northbridge/intel: move mrccache.c of sandybridge + haswell to common 2016-03-11 19:00:14 +01:00
northbridge.c Revert "northbridge/intel/peg: Disable unused ports" 2016-02-09 20:02:36 +01:00
pei_data.h
ram_calc.c
raminit.c northbridge/intel: Add required space before opening parenthesis '(' 2016-08-31 20:30:03 +02:00
raminit.h Merge sandy/ivybridge romstage flow for MRC and non-MRC. 2016-02-12 04:20:57 +01:00
raminit_mrc.c bootmode: Get rid of CONFIG_BOOTMODE_STRAPS 2016-07-28 00:36:22 +02:00
raminit_native.h Merge sandy/ivybridge romstage flow for MRC and non-MRC. 2016-02-12 04:20:57 +01:00
raminit_patterns.h
report_platform.c Remove non-ascii & unprintable characters 2016-08-01 21:44:45 +02:00
romstage.c intel/model_206ax: Prepare for dynamic CONFIG_RAMTOP 2016-06-22 10:50:51 +02:00
sandybridge.h northbridge/intel/sandybridge: transition away from device_t 2016-09-04 05:48:44 +02:00
udelay.c