4da4d3c944
printk() shouldn't be called until the consoles have been initialized. This just so happened to work by luck. Once CONFIG_SMP is enabled that breaks because of spinlock usage in uncached memory. BUG=chrome-os-partner:31761 BRANCH=None TEST=Built with CONFIG_SMP and ramstage doesn't hang early. Change-Id: I4bf5d98e409840cf07a7759e9273d770f3bbf8bb Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 6ec672e52eda69f2b5abb747807a496bb973088f Original-Change-Id: I247caac410894fb896dfb25a27c3a3213ef7f020 Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/216429 Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/9036 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
82 lines
2.4 KiB
C
82 lines
2.4 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <stdlib.h>
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#include <stdint.h>
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#include <memrange.h>
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#include <arch/mmu.h>
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#include "mmu_operations.h"
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#include <soc/addressmap.h>
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/* This structure keeps track of all the mmap memory ranges for t132 */
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static struct memranges t132_mmap_ranges;
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static void tegra132_memrange_init(struct memranges *map)
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{
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uint64_t start,end;
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const unsigned long devmem = MA_DEV | MA_S | MA_RW;
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const unsigned long cachedmem = MA_MEM | MA_NS | MA_RW;
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const unsigned long secure_mem = MA_MEM | MA_S | MA_RW;
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uintptr_t tz_base_mib;
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size_t tz_size_mib;
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memranges_init_empty(map);
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memory_in_range_below_4gb(&start,&end);
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/* Device memory below DRAM */
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memranges_insert(map, 0, start * MiB, devmem);
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/* DRAM */
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memranges_insert(map, start * MiB, (end-start) * MiB, cachedmem);
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memory_in_range_above_4gb(&start,&end);
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memranges_insert(map, start * MiB, (end-start) * MiB, cachedmem);
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/* SRAM */
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memranges_insert(map, TEGRA_SRAM_BASE, TEGRA_SRAM_SIZE, cachedmem);
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/* Add TZ carveout. */
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carveout_range(CARVEOUT_TZ, &tz_base_mib, &tz_size_mib);
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memranges_insert(map, tz_base_mib * MiB, tz_size_mib * MiB, secure_mem);
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}
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void __attribute__((weak)) mainboard_add_memory_ranges(struct memranges *map)
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{
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/* Don't add any ranges by default. */
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}
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void tegra132_mmu_init(void)
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{
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uintptr_t tz_base_mib;
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size_t tz_size_mib;
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size_t ttb_size_mib;
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struct memranges *map = &t132_mmap_ranges;
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tegra132_memrange_init(map);
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mainboard_add_memory_ranges(map);
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/* Place page tables at the base of the trust zone region. */
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carveout_range(CARVEOUT_TZ, &tz_base_mib, &tz_size_mib);
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tz_base_mib *= MiB;
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ttb_size_mib = TTB_SIZE * MiB;
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mmu_init(map, (void *)tz_base_mib, ttb_size_mib);
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mmu_enable();
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}
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