coreboot-kgpe-d16/src/soc/nvidia/tegra132/mmu_operations.c
Aaron Durbin 4da4d3c944 tegra132: remove printk() before console_init()
printk() shouldn't be called until the consoles have been
initialized. This just so happened to work by luck. Once
CONFIG_SMP is enabled that breaks because of spinlock
usage in uncached memory.

BUG=chrome-os-partner:31761
BRANCH=None
TEST=Built with CONFIG_SMP and ramstage doesn't hang early.

Change-Id: I4bf5d98e409840cf07a7759e9273d770f3bbf8bb
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 6ec672e52eda69f2b5abb747807a496bb973088f
Original-Change-Id: I247caac410894fb896dfb25a27c3a3213ef7f020
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/216429
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/9036
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-27 08:04:44 +01:00

82 lines
2.4 KiB
C

/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <stdlib.h>
#include <stdint.h>
#include <memrange.h>
#include <arch/mmu.h>
#include "mmu_operations.h"
#include <soc/addressmap.h>
/* This structure keeps track of all the mmap memory ranges for t132 */
static struct memranges t132_mmap_ranges;
static void tegra132_memrange_init(struct memranges *map)
{
uint64_t start,end;
const unsigned long devmem = MA_DEV | MA_S | MA_RW;
const unsigned long cachedmem = MA_MEM | MA_NS | MA_RW;
const unsigned long secure_mem = MA_MEM | MA_S | MA_RW;
uintptr_t tz_base_mib;
size_t tz_size_mib;
memranges_init_empty(map);
memory_in_range_below_4gb(&start,&end);
/* Device memory below DRAM */
memranges_insert(map, 0, start * MiB, devmem);
/* DRAM */
memranges_insert(map, start * MiB, (end-start) * MiB, cachedmem);
memory_in_range_above_4gb(&start,&end);
memranges_insert(map, start * MiB, (end-start) * MiB, cachedmem);
/* SRAM */
memranges_insert(map, TEGRA_SRAM_BASE, TEGRA_SRAM_SIZE, cachedmem);
/* Add TZ carveout. */
carveout_range(CARVEOUT_TZ, &tz_base_mib, &tz_size_mib);
memranges_insert(map, tz_base_mib * MiB, tz_size_mib * MiB, secure_mem);
}
void __attribute__((weak)) mainboard_add_memory_ranges(struct memranges *map)
{
/* Don't add any ranges by default. */
}
void tegra132_mmu_init(void)
{
uintptr_t tz_base_mib;
size_t tz_size_mib;
size_t ttb_size_mib;
struct memranges *map = &t132_mmap_ranges;
tegra132_memrange_init(map);
mainboard_add_memory_ranges(map);
/* Place page tables at the base of the trust zone region. */
carveout_range(CARVEOUT_TZ, &tz_base_mib, &tz_size_mib);
tz_base_mib *= MiB;
ttb_size_mib = TTB_SIZE * MiB;
mmu_init(map, (void *)tz_base_mib, ttb_size_mib);
mmu_enable();
}