coreboot-kgpe-d16/src/soc/nvidia/tegra132
Julius Werner ec5e5e0db2 New mechanism to define SRAM/memory map with automatic bounds checking
This patch creates a new mechanism to define the static memory layout
(primarily in SRAM) for a given board, superseding the brittle mass of
Kconfigs that we were using before. The core part is a memlayout.ld file
in the mainboard directory (although boards are expected to just include
the SoC default in most cases), which is the primary linker script for
all stages (though not rmodules for now). It uses preprocessor macros
from <memlayout.h> to form a different valid linker script for all
stages while looking like a declarative, boilerplate-free map of memory
addresses to the programmer. Linker asserts will automatically guarantee
that the defined regions cannot overlap. Stages are defined with a
maximum size that will be enforced by the linker. The file serves to
both define and document the memory layout, so that the documentation
cannot go missing or out of date.

The mechanism is implemented for all boards in the ARM, ARM64 and MIPS
architectures, and should be extended onto all systems using SRAM in the
future. The CAR/XIP environment on x86 has very different requirements
and the layout is generally not as static, so it will stay like it is
and be unaffected by this patch (save for aligning some symbol names for
consistency and sharing the new common ramstage linker script include).

BUG=None
TEST=Booted normally and in recovery mode, checked suspend/resume and
the CBMEM console on Falco, Blaze (both normal and vboot2), Pinky and
Pit. Compiled Ryu, Storm and Urara, manually compared the disassemblies
with ToT and looked for red flags.

Change-Id: Ifd2276417f2036cbe9c056f17e42f051bcd20e81
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: f1e2028e7ebceeb2d71ff366150a37564595e614
Original-Change-Id: I005506add4e8fcdb74db6d5e6cb2d4cb1bd3cda5
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/213370
Reviewed-on: http://review.coreboot.org/9283
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-by: Aaron Durbin <adurbin@google.com>
2015-04-06 22:05:01 +02:00
..
include/soc tegra132: remove framebuffer reservation 2015-04-04 15:03:37 +02:00
lp0 tegra132: Add tegra_lp0_resume code 2015-04-06 19:12:39 +02:00
32bit_reset.S tegra132: refactor cpu startup code 2015-03-27 08:03:39 +01:00
addressmap.c New mechanism to define SRAM/memory map with automatic bounds checking 2015-04-06 22:05:01 +02:00
bootblock.c tegra132: Store ODMDATA from BCT into PMC scratch for use by kernel 2015-04-04 15:03:55 +02:00
bootblock_asm.S New mechanism to define SRAM/memory map with automatic bounds checking 2015-04-06 22:05:01 +02:00
cbfs.c New mechanism to define SRAM/memory map with automatic bounds checking 2015-04-06 22:05:01 +02:00
cbmem.c tegra132: remove framebuffer reservation 2015-04-04 15:03:37 +02:00
ccplex.c tegra132: measure romstage timings 2015-03-28 08:45:05 +01:00
ccplex.h tegra132: refactor cpu startup code 2015-03-27 08:03:39 +01:00
chip.h tegra132: remove private spin table implementation 2015-03-28 07:05:14 +01:00
clk_rst.h tegra132: Clean up clock register writes 2015-03-28 08:44:55 +01:00
clock.c tegra132/rush/ryu: Use CLK_RST_REG instead of &clk_rst->... 2015-03-28 08:44:56 +01:00
clst_clk.h Tegra132: Configure CPU clock 2015-03-17 16:39:22 +01:00
cpu.c tegra132/rush/ryu: Use CLK_RST_REG instead of &clk_rst->... 2015-03-28 08:44:56 +01:00
cpu_lib.S tegra132: implement smp_processor_id() 2015-03-27 08:03:53 +01:00
dma.c coreboot t132,rush: Add mainboard specific bootblock_init 2015-03-04 18:15:44 +01:00
dma.h coreboot t132,rush: Add mainboard specific bootblock_init 2015-03-04 18:15:44 +01:00
emc.h coreboot rush: Add dram init code 2015-03-04 18:23:46 +01:00
flow.h tegra132: Enable bootblock support in tegra132 including UART support 2015-03-02 21:17:21 +01:00
funitcfg.c tegra132: Clean up clock register writes 2015-03-28 08:44:55 +01:00
gic.c tegra132: use generic GIC driver 2015-03-28 07:05:06 +01:00
gpio.h tegra132: provide pad configuration interface 2015-03-24 15:27:40 +01:00
i2c.c coreboot t132,rush: Add mainboard specific bootblock_init 2015-03-04 18:15:44 +01:00
i2c6.c tegra132: Replace use of clk_rst with CLK_RST_REG 2015-03-28 08:45:08 +01:00
Kconfig New mechanism to define SRAM/memory map with automatic bounds checking 2015-04-06 22:05:01 +02:00
maincpu.h tegra132: Enable bootblock support in tegra132 including UART support 2015-03-02 21:17:21 +01:00
maincpu.S tegra132: Enable bootblock support in tegra132 including UART support 2015-03-02 21:17:21 +01:00
Makefile.inc New mechanism to define SRAM/memory map with automatic bounds checking 2015-04-06 22:05:01 +02:00
mc.h t132: Enable SMMU translations 2015-04-04 15:04:18 +02:00
memlayout.ld New mechanism to define SRAM/memory map with automatic bounds checking 2015-04-06 22:05:01 +02:00
mmu_operations.c tegra132: remove printk() before console_init() 2015-03-27 08:04:44 +01:00
mmu_operations.h tegra132: Increase TrustZone Carveout Region size 2015-03-27 08:03:47 +01:00
monotonic_timer.c coreboot t132,rush: Add mainboard specific bootblock_init 2015-03-04 18:15:44 +01:00
padconfig.c tegra132: provide pad configuration interface 2015-03-24 15:27:40 +01:00
pinmux.h tegra132: fix gpio constants 2015-03-25 22:31:51 +01:00
pmc.h tegra132: Add support for pmc_rst_status get and print 2015-03-28 08:45:09 +01:00
power.c tegra132: Add support for pmc_rst_status get and print 2015-03-28 08:45:09 +01:00
power.h tegra132: Add support for pmc_rst_status get and print 2015-03-28 08:45:09 +01:00
ramstage.c Tegra132: Configure CPU clock 2015-03-17 16:39:22 +01:00
reset.c tegra132: use pre-existing reset API 2015-03-25 22:31:54 +01:00
romstage.c tegra132: implement platform_prog_run() 2015-04-03 14:54:00 +02:00
romstage_asm.S New mechanism to define SRAM/memory map with automatic bounds checking 2015-04-06 22:05:01 +02:00
sdram.c tegra132: Add LPDDR3 SDRAM init in coreboot. 2015-03-27 08:04:37 +01:00
sdram.h t132: Enable cbmem console support 2015-03-05 17:31:26 +01:00
sdram_lp0.c coreboot rush: Add dram init code 2015-03-04 18:23:46 +01:00
sdram_param.h coreboot rush: Add dram init code 2015-03-04 18:23:46 +01:00
secmon.c tegra132: Add secmon support 2015-03-28 07:05:10 +01:00
soc.c tegra132: remove framebuffer reservation 2015-04-04 15:03:37 +02:00
spi.c cbfs: remove cbfs_core.h includes 2015-03-31 23:03:10 +02:00
spi.h coreboot t132,rush: Add mainboard specific bootblock_init 2015-03-04 18:15:44 +01:00
stack.S New mechanism to define SRAM/memory map with automatic bounds checking 2015-04-06 22:05:01 +02:00
sysctr.h tegra132: Enable bootblock support in tegra132 including UART support 2015-03-02 21:17:21 +01:00
timer.c tegra132: convert to stopwatch API 2015-03-21 17:01:12 +01:00
uart.c tegra132: Enable bootblock support in tegra132 including UART support 2015-03-02 21:17:21 +01:00