David Hendricks a5d2a8d18b veyron_*: Enable eventlogging ... BUG=chrome-os-partner:34436 BRANCH=none TEST=Built and booted on pinky w/ depthcharge fmap patch, used mosys to verify that eventlog entries get populated: entry="0" timestamp="2015-01-06 13:45:33" type="Log area cleared" bytes="4096" entry="1" timestamp="2015-01-06 13:45:33" type="System boot" count="0" entry="2" timestamp="2015-01-06 13:45:33" type="Chrome OS Developer Mode" Change-Id: I74ba8b271328453c8b91f11e7858754a80806c31 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: 197010f057f4835a30ed2e71f47ca51fc181afe4 Original-Signed-off-by: David Hendricks <dhendrix@chromium.org> Original-Change-Id: I19cb884be5c3e00975599e96e0223e33d32e7c0d Original-Reviewed-on: https://chromium-review.googlesource.com/238830 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Commit-Queue: Julius Werner <jwerner@chromium.org> Original-Tested-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/9644 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>		2015-04-17 09:56:20 +02:00
..
sdram_inf	google/veyron_*: Remove unused sdram-ddr-hynix-2GB.inc	2015-04-15 22:09:01 +02:00
board.h	veyron: move setup_chromeos_gpios() prototype to board.h	2015-04-17 09:24:13 +02:00
boardid.c
bootblock.c	veyron_*: Move PMIC_BUS to a Kconfig variable	2015-04-15 16:46:37 +02:00
chromeos.c	veyron: Add "backlight" GPIO to coreboot table	2015-04-15 16:54:07 +02:00
devicetree.cb	rk3288: support edp HPD function	2015-04-15 22:13:40 +02:00
Kconfig	rk3288: detect sdram size at runtime	2015-04-17 09:26:09 +02:00
mainboard.c	veyron_*: Enable eventlogging	2015-04-17 09:56:20 +02:00
Makefile.inc
memlayout.ld
reset.c
romstage.c	rk3288: detect sdram size at runtime	2015-04-17 09:26:09 +02:00
sdram_configs.c