coreboot-kgpe-d16/src/northbridge
Arthur Heymans aa990e9289 sb/intel/i82801jx: Move early sb init to a common place
Setting southbridge GPIO is now done after console init,
which should be fine. This code is partially copied from
i82801ix.

Change-Id: I51dd30de4a82898b0f1d8c4308e8de4a00d1b7aa
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36756
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-11-14 11:30:21 +00:00
..
amd src/[northbridge,security]: change "unsigned" to "unsigned int" 2019-10-27 18:12:50 +00:00
intel sb/intel/i82801jx: Move early sb init to a common place 2019-11-14 11:30:21 +00:00
via/vx900 cpu/x86/tsc: Flip and rename TSC_CONSTANT_RATE to UNKNOWN_TSC_RATE 2019-11-03 06:15:35 +00:00