aad0747216
Taking device_t as a parameter, this allows to alter the PCI config access handlers. This is useful to add tracing of PCI config writes for devices having problems to initialise correctly. On older AMD platform PCI MMIO may not be able to fully configure all PCI devices/nodes, while MMIO_SUPPORT_DEFAULT would be preferred due to its atomic nature. So those can be forced to IO config instead. Change-Id: I2162884185bbfe461b036caf737980b45a51e522 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3608 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
98 lines
3.4 KiB
C
98 lines
3.4 KiB
C
/*
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* PCI defines and function prototypes
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* Copyright 1994, Drew Eckhardt
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* Copyright 1997--1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
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*
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* For more information, please consult the following manuals (look at
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* http://www.pcisig.com/ for how to get them):
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*
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* PCI BIOS Specification
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* PCI Local Bus Specification
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* PCI to PCI Bridge Specification
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* PCI System Design Guide
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*/
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#ifndef PCI_H
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#define PCI_H
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#include <stdint.h>
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#include <stddef.h>
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#include <device/pci_def.h>
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#include <device/resource.h>
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#include <device/device.h>
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#if !defined(__PRE_RAM__) && !defined(__SMM__)
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#include <device/pci_ops.h>
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#include <device/pci_rom.h>
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/* Common pci operations without a standard interface */
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struct pci_operations {
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/* set the Subsystem IDs for the PCI device */
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void (*set_subsystem)(device_t dev, unsigned vendor, unsigned device);
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};
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/* Common pci bus operations */
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struct pci_bus_operations {
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uint8_t (*read8) (struct bus *pbus, int bus, int devfn, int where);
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uint16_t (*read16) (struct bus *pbus, int bus, int devfn, int where);
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uint32_t (*read32) (struct bus *pbus, int bus, int devfn, int where);
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void (*write8) (struct bus *pbus, int bus, int devfn, int where, uint8_t val);
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void (*write16) (struct bus *pbus, int bus, int devfn, int where, uint16_t val);
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void (*write32) (struct bus *pbus, int bus, int devfn, int where, uint32_t val);
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};
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struct pci_driver {
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const struct device_operations *ops;
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unsigned short vendor;
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unsigned short device;
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const unsigned short *devices;
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};
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#define __pci_driver __attribute__ ((used,__section__(".rodata.pci_driver")))
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/** start of compile time generated pci driver array */
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extern struct pci_driver pci_drivers[];
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/** end of compile time generated pci driver array */
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extern struct pci_driver epci_drivers[];
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extern struct device_operations default_pci_ops_dev;
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extern struct device_operations default_pci_ops_bus;
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void pci_dev_read_resources(device_t dev);
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void pci_bus_read_resources(device_t dev);
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void pci_dev_set_resources(device_t dev);
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void pci_dev_enable_resources(device_t dev);
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void pci_bus_enable_resources(device_t dev);
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void pci_bus_reset(struct bus *bus);
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device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn);
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unsigned int do_pci_scan_bridge(device_t bus, unsigned int max,
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unsigned int (*do_scan_bus)(struct bus *bus,
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unsigned min_devfn, unsigned max_devfn, unsigned int max));
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unsigned int pci_scan_bridge(device_t bus, unsigned int max);
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unsigned int pci_scan_bus(struct bus *bus, unsigned min_devfn, unsigned max_devfn, unsigned int max);
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uint8_t pci_moving_config8(struct device *dev, unsigned reg);
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uint16_t pci_moving_config16(struct device *dev, unsigned reg);
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uint32_t pci_moving_config32(struct device *dev, unsigned reg);
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unsigned pci_find_next_capability(device_t dev, unsigned cap, unsigned last);
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unsigned pci_find_capability(device_t dev, unsigned cap);
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struct resource *pci_get_resource(struct device *dev, unsigned long index);
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void pci_dev_set_subsystem(device_t dev, unsigned vendor, unsigned device);
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void pci_dev_init(struct device *dev);
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void pci_assign_irqs(unsigned bus, unsigned slot,
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const unsigned char pIntAtoD[4]);
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#define PCI_IO_BRIDGE_ALIGN 4096
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#define PCI_MEM_BRIDGE_ALIGN (1024*1024)
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static inline const struct pci_operations *ops_pci(device_t dev)
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{
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const struct pci_operations *pops;
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pops = 0;
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if (dev && dev->ops) {
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pops = dev->ops->ops_pci;
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}
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return pops;
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}
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#endif
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#endif /* PCI_H */
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