6b5bc77c9b
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
34 lines
969 B
C
34 lines
969 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ops.h>
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#include <device/pci_def.h>
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#include <amdblocks/sata.h>
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#include <soc/southbridge.h>
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void soc_enable_sata_features(struct device *dev)
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{
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u8 *ahci_ptr;
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u32 misc_ctl, cap_cfg;
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u32 temp;
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/* unlock the write-protect */
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misc_ctl = pci_read_config32(dev, SATA_MISC_CONTROL_REG);
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misc_ctl |= SATA_MISC_SUBCLASS_WREN;
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pci_write_config32(dev, SATA_MISC_CONTROL_REG, misc_ctl);
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/* set the SATA AHCI mode to allow port expanders */
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ahci_ptr = (u8 *)(uintptr_t)ALIGN_DOWN(
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pci_read_config32(dev, PCI_BASE_ADDRESS_5), 256);
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cap_cfg = read32(ahci_ptr + SATA_CAPABILITIES_REG);
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cap_cfg |= SATA_CAPABILITY_SPM;
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write32(ahci_ptr + SATA_CAPABILITIES_REG, cap_cfg);
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/* lock the write-protect */
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temp = pci_read_config32(dev, SATA_MISC_CONTROL_REG);
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temp &= ~SATA_MISC_SUBCLASS_WREN;
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pci_write_config32(dev, SATA_MISC_CONTROL_REG, temp);
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};
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