af4bd5633d
Retype the `pcie_port_coalesce` devicetree options and related variables to better reflect their bivalue (boolean) nature. Change-Id: I6a4dfe277a8f83a9eb58515fc4eaa2fee0747ddb Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60416 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
167 lines
5.3 KiB
Text
167 lines
5.3 KiB
Text
chip northbridge/intel/sandybridge
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# IGD Displays
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register "gfx" = "GMA_STATIC_DISPLAYS(1)"
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# Enable DisplayPort Hotplug with 6ms pulse
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register "gpu_dp_d_hotplug" = "0x06"
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# Enable Panel as LVDS and configure power delays
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register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
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register "gpu_panel_power_cycle_delay" = "1"
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register "gpu_panel_power_up_delay" = "300" # T1+T2: 30ms
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register "gpu_panel_power_down_delay" = "300" # T5+T6: 30ms
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register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms
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register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms
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register "gpu_cpu_backlight" = "0x1155"
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register "gpu_pch_backlight" = "0x06100610"
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device cpu_cluster 0 on
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chip cpu/intel/model_206ax
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# Magic APIC ID to locate this chip
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device lapic 0 on end
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device lapic 0xacac off end
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register "acpi_c1" = "1" # ACPI(C1) = MWAIT(C1)
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register "acpi_c2" = "3" # ACPI(C2) = MWAIT(C3)
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register "acpi_c3" = "5" # ACPI(C3) = MWAIT(C7)
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end
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end
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device domain 0 on
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subsystemid 0x17aa 0x21d2 inherit
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device pci 00.0 on end # host bridge
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device pci 01.0 on end # NVIDIA Corporation GF119M [NVS 4200M]
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device pci 02.0 on
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subsystemid 0x17aa 0x21d3
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end # Integrated Graphics Controller
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chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
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# GPI routing
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# 0 No effect (default)
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# 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
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# 2 SCI (if corresponding GPIO_EN bit is also set)
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register "alt_gp_smi_en" = "0x0000"
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register "gpi1_routing" = "2"
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register "gpi13_routing" = "2"
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# Enable SATA ports 0 (HDD bay) & 1 (ODD bay) & 2 (mSATA) & 4 (dock)
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register "sata_port_map" = "0x17"
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# Set max SATA speed to 6.0 Gb/s
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register "sata_interface_speed_support" = "0x3"
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register "gen1_dec" = "0x7c1601"
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register "gen2_dec" = "0x0c15e1"
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register "gen4_dec" = "0x0c06a1"
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register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }"
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# Enable zero-based linear PCIe root port functions
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register "pcie_port_coalesce" = "true"
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# device specific SPI configuration
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register "spi_uvscc" = "0x2005"
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register "spi_lvscc" = "0x2005"
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device pci 16.0 on end # Management Engine Interface 1
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device pci 16.1 off end # Management Engine Interface 2
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device pci 16.2 off end # Management Engine IDE-R
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device pci 16.3 off end # Management Engine KT
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device pci 19.0 on
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subsystemid 0x17aa 0x21ce
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end # Intel Gigabit Ethernet
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device pci 1a.0 on end # USB Enhanced Host Controller #2
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device pci 1b.0 on end # High Definition Audio Controller
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device pci 1c.0 off end # PCIe Port #1
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device pci 1c.1 on end # PCIe Port #2 Integrated Wireless LAN
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device pci 1c.2 off end # PCIe Port #3
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device pci 1c.3 on
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smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
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end # PCIe Port #4 ExpressCard
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device pci 1c.4 on end # PCIe Port #5 NEC Corporation uPD720200A USB 3.0 Host Controller
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device pci 1c.5 off end # PCIe Port #6 Intel Gigabit Ethernet PHY (not PCIe)
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device pci 1c.6 off end # PCIe Port #7
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device pci 1c.7 off end # PCIe Port #8
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device pci 1d.0 on end # USB Enhanced Host Controller #1
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device pci 1e.0 off end # PCI bridge
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device pci 1f.0 on
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chip ec/lenovo/pmh7
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device pnp ff.1 on end # dummy
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register "backlight_enable" = "0x01"
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register "dock_event_enable" = "0x01"
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end
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chip drivers/pc80/tpm
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device pnp 0c31.0 on end
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end
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chip ec/lenovo/h8
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device pnp ff.2 on # dummy
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io 0x60 = 0x62
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io 0x62 = 0x66
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io 0x64 = 0x1600
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io 0x66 = 0x1604
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end
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register "config0" = "0xa7"
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register "config1" = "0x01"
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register "config2" = "0xa0"
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register "config3" = "0xe2"
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register "has_keyboard_backlight" = "0"
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register "beepmask0" = "0x02"
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register "beepmask1" = "0x86"
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register "has_power_management_beeps" = "1"
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register "event2_enable" = "0xff"
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register "event3_enable" = "0xff"
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register "event4_enable" = "0xf0"
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register "event5_enable" = "0x3c"
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register "event6_enable" = "0x00"
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register "event7_enable" = "0xa1"
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register "event8_enable" = "0x7b"
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register "event9_enable" = "0xff"
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register "eventa_enable" = "0x00"
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register "eventb_enable" = "0x00"
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register "eventc_enable" = "0xff"
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register "eventd_enable" = "0xff"
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register "evente_enable" = "0x0d"
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register "has_bdc_detection" = "1"
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register "bdc_gpio_num" = "54"
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register "bdc_gpio_lvl" = "0"
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end
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chip drivers/lenovo/hybrid_graphics
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device pnp ff.f on end # dummy
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register "detect_gpio" = "21"
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register "has_panel_hybrid_gpio" = "1"
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register "panel_hybrid_gpio" = "52"
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register "panel_integrated_lvl" = "1"
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register "has_backlight_gpio" = "0"
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register "has_dgpu_power_gpio" = "0"
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register "has_thinker1" = "1"
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end
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end # LPC Controller
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device pci 1f.2 on end # 6 port SATA AHCI Controller
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device pci 1f.3 on
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# eeprom, 8 virtual devices, same chip
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chip drivers/i2c/at24rf08c
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device i2c 54 on end
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device i2c 55 on end
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device i2c 56 on end
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device i2c 57 on end
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device i2c 5c on end
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device i2c 5d on end
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device i2c 5e on end
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device i2c 5f on end
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end
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end # SMBus Controller
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device pci 1f.5 off end # SATA Controller 2
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device pci 1f.6 on end # Thermal
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end
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end
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end
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