coreboot-kgpe-d16/src/southbridge
Arthur Heymans 9ed0df4c38 sb/intel/i82801ix: Add common code to set up LPC IO decode ranges
This does the following:
- Add gen[1-4]_dec options to the devicetree to set up generic LPC
  decode ranges in the southbridge code.
- Move setting up some default decode ranges to a common place. If
  somehow a board needs to override this behavior it can happen in the
  mb_setup_superio() hook (that will be renamed when moving to
  C_ENVIRONMENT_BOOTBLOCK).

Change-Id: I3d904b1125bc410c11aa73a89b1969284e88dac1
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35991
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2019-10-14 08:15:49 +00:00
..
amd acpi_table_header: Replace hard-coded length via sizeof(acpi_fadt_t) 2019-10-09 22:14:54 +00:00
broadcom device: Use scan_static_bus() over scan_lpc_bus() 2019-10-08 12:59:56 +00:00
intel sb/intel/i82801ix: Add common code to set up LPC IO decode ranges 2019-10-14 08:15:49 +00:00
nvidia device: Use scan_static_bus() over scan_lpc_bus() 2019-10-08 12:59:56 +00:00
ricoh/rl5c476 {northbridge, soc, southbridge}/intel: Make use of generic set_subsystem() 2019-03-21 16:19:34 +00:00
ti devicetree: Fix improper use of chip_operations 2019-10-04 16:29:31 +00:00
via/common sb/via/common: Fix indirect includes 2019-03-15 05:02:35 +00:00