coreboot-kgpe-d16/src/southbridge
Kyösti Mälkki ae7ac8a723 ACPI: Separate ChromeOS NVS in ASL
For builds with MAINBOARD_HAS_CHROMEOS=y but CHROMEOS=n, there
is reduced dsdt.aml size and reduced GNVS allocation from cbmem.

More importantly, it's less error-prone when the OperationRegion
size is not hard-coded inside the .asl files.

Change-Id: I54b0d63a41561f9a5d9ebde77967e6d21ee014cd
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49477
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-28 08:59:11 +00:00
..
amd sb,soc/amd: Rename PMOD to PICM in ASL 2021-01-27 11:19:38 +00:00
intel ACPI: Separate ChromeOS NVS in ASL 2021-01-28 08:59:11 +00:00
ricoh/rl5c476 src/southbridge: Drop unneeded empty lines 2020-09-21 16:29:35 +00:00
ti