d4a7dceaa5
Based on feedback and experiences from new coreboot users, it isn't clear that Tutorial 1 is mainly intended to set up the toolchain and will not produce a bootable ROM for their board. Thus, add a note explicitly mentioning this with a short explanation. The process of manually building and adding the payload is also unusual, since payloads are usually handled automatically by the build system. This adds a note in the summary to provide an explanation of this. The savedefconfig output is also outdated, as Kconfig now outputs additional lines (even though many of those are the same as the defaults). This has caused confusion, leading users to think that they may have configured coreboot incorrectly. Update this to the current defconfig contents and add a note that this may change depending on the coreboot version. Change-Id: I13206aa05a425ddfe33ee35feff0db490585a59f Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73816 Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> |
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| .. | ||
| RFC | ||
| _static | ||
| acpi | ||
| arch | ||
| community | ||
| contributing | ||
| drivers | ||
| getting_started | ||
| gfx | ||
| infrastructure | ||
| lib | ||
| mainboard | ||
| northbridge | ||
| releases | ||
| sbom | ||
| security | ||
| soc | ||
| superio | ||
| technotes | ||
| tutorial | ||
| util | ||
| vendorcode | ||
| .gitignore | ||
| .mdl_style.rb | ||
| AMD-S3.txt | ||
| COPYING | ||
| Makefile | ||
| Makefile.sphinx | ||
| POSTCODES | ||
| acronyms.md | ||
| beginverbatim.tex | ||
| cbfs.txt | ||
| codeflow.svg | ||
| conf.py | ||
| corebootBuildingGuide.tex | ||
| coreboot_logo.bmp | ||
| coreboot_logo.png | ||
| coreboot_logo.svg | ||
| distributions.md | ||
| documentation_license.md | ||
| endverbatim.tex | ||
| external_docs.md | ||
| gcov.txt | ||
| hypertransport.svg | ||
| index.md | ||
| payloads.md | ||
| util.md | ||
