John Zhao b1c53fc94a mb/intel/tglrvp: Enable TCSS xHCI, PCIe root ports and DMA controllers ... This explicitly enables TCSS xHCI, PCIe root ports and DMA controllers from TGL RVP platform devicetree setting. BUG=🅱️146624360 TEST=Built and booted on TGL RVP. Signed-off-by: John Zhao <john.zhao@intel.com> Change-Id: I0111542eef253f469f679cdc4b81812438dff4ce Reviewed-on: https://review.coreboot.org/c/coreboot/+/41386 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>		2020-06-02 20:14:44 +00:00
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acpi	acpi: Add new file for implementing Type-C Connector class	2020-05-28 23:54:43 +00:00
arch	arch/x86/postcar_loader: utilize var_mtrr_context API	2020-06-02 16:10:05 +00:00
commonlib	commonlib: Add CBFS_TYPE_BOOTBLOCK	2020-06-02 07:26:44 +00:00
console	treewide: Remove "this file is part of" lines	2020-05-11 17:11:40 +00:00
cpu	amd/microcode: Change equivalant ID width to 16bit	2020-06-02 18:55:01 +00:00
device	src: Remove redundant includes	2020-06-02 07:42:32 +00:00
drivers	arch/x86/postcar_loader: utilize var_mtrr_context API	2020-06-02 16:10:05 +00:00
ec	src: Remove redundant includes	2020-06-02 07:42:32 +00:00
include	amd/microcode: Change equivalant ID width to 16bit	2020-06-02 18:55:01 +00:00
lib	fw_config: Add firmware configuration interface	2020-06-02 16:40:04 +00:00
mainboard	mb/intel/tglrvp: Enable TCSS xHCI, PCIe root ports and DMA controllers	2020-06-02 20:14:44 +00:00
northbridge	src: Remove redundant includes	2020-06-02 07:42:32 +00:00
security	src: Remove unused 'include <fmap.h>'	2020-06-02 07:42:40 +00:00
soc	soc/amd/picasso: Install AGESA ACPI tables	2020-06-02 13:52:16 +00:00
southbridge	sb/intel/i82371eb: Fix 16-bit read/write PCI_COMMAND register	2020-06-02 07:43:48 +00:00
superio	superio/nuvoton/nct6779d: Open some LDN config registers	2020-06-02 08:02:48 +00:00
vendorcode	soc/amd/picasso: Install AGESA ACPI tables	2020-06-02 13:52:16 +00:00
Kconfig	fw_config: Add firmware configuration interface	2020-06-02 16:40:04 +00:00