Angel Pons b21bffae0c sb/intel: Define CONFIG_FIXED_SMBUS_IO_BASE ... Make it default to 0x400, which is what the touched southbridges use. Change-Id: I95cb1730d5bf6f596ed1ca8e7dba40b6a9e882fe Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43037 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>		2020-07-20 17:04:46 +00:00
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amd	src: Make HAVE_CF9_RESET set the FADT reset register	2020-07-20 13:23:13 +00:00
intel	sb/intel: Define CONFIG_FIXED_SMBUS_IO_BASE	2020-07-20 17:04:46 +00:00
ricoh/rl5c476	treewide: Remove "this file is part of" lines	2020-05-11 17:11:40 +00:00
ti	sb/ti/pci7420: Drop dead code	2020-07-09 23:45:38 +00:00