140 lines
4.2 KiB
Markdown
140 lines
4.2 KiB
Markdown
coreboot 4.10 release notes
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===========================
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The 4.10 release covers commit a2faaa9a2 to commit ae317695e3
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There is a pgp signed 4.10 tag in the git repository, and a branch will
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be created as needed.
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In nearly 8 months since 4.9 we had 198 authors commit 2538 changes
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to master. Of these, 85 authors made their first commit to coreboot:
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Welcome!
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Between the releases the tree grew by about 11000 lines of code plus
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5000 lines of comments.
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Again, a big Thank You to all contributors who helped shape the coreboot
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project, community and code with their effort, no matter if through
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development, review, testing, documentation or by helping people asking
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questions on our venues like IRC or our mailing list.
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What's New
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----------
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Most of the changes were to mainboards, and on the chipset side, lots
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of activity concentrated on x86. However compared to previous releases
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activity (and therefore interest, probably) increased in vboot and in
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non-x86 architectures. However it's harder this time to give this release
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a single topic like the last: This release accumulates some of everything.
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Clean Up
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--------
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As usual, there was a lot of cleaning up going on, and there notably,
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a good chunk of this year's Google Summer of Code project to clean out
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the issues reported by Coverity Scan is already in.
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The only larger scale change that was registered in the pre-release
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notes was also about cleaning up the tree:
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### `device_t` is no more
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coreboot used to have a data type, `device_t` that changed shape depending on
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whether it is compiled for romstage (with limited memory) or ramstage (with
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unlimited memory as far as coreboot is concerned). It's an old relic from the
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time when romstage wasn't operated in Cache-As-RAM mode, but compiled with
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our romcc compiler.
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That data type is now gone.
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Release Notes maintenance
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-------------------------
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Speaking of pre-release notes: After 4.10 we'll start a document for
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4.11 in the git repository. Feel free to add notable achievements there
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so we remember to give them a shout out in the next release's notes.
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Known Issues
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------------
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Sadly, Google Cyan is broken in this release. It doesn't work with the
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"C environment" bootblock (as compared to the old romcc type bootblock)
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which is now the default. Sadly it doesn't help to simply revert that
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change because doing so breaks other boards.
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If you want to use Google Cyan with the release (or if
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you're tracking the master branch), please keep an eye on
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https://review.coreboot.org/c/coreboot/+/34304 where a solution for this
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issue is sought.
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Deprecations
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------------
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As announced in the 4.9 release notes, there are no deprecations after 4.10.
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While 4.10 is also released late and we target a 4.11 release in October we
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nonetheless want to announce deprecations this time: These are under
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discussion since January, people are working on mitigations for about as long
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and so it should be possible to resolve the outstanding issues by the end of
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October.
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Specifically, we want to require code to work with the following Kconfig
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options so we can remove the options and the code they disable:
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* C\_ENVIRONMENT\_BOOTBLOCK
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* NO\_CAR\_GLOBAL\_MIGRATION
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* RELOCATABLE\_RAMSTAGE
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These only affect x86. If your platform only works without them, please
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look into fixing that.
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Added 28 mainboards:
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--------------------
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* ASROCK H110M-DVS
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* ASUS H61M-CS
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* ASUS P5G41T-M-LX
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* ASUS P5QPL-AM
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* ASUS P8Z77-M-PRO
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* FACEBOOK FBG1701
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* FOXCONN G41M
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* GIGABYTE GA-H61MA-D3V
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* GOOGLE BLOOG
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* GOOGLE FLAPJACK
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* GOOGLE GARG
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* GOOGLE HATCH-WHL
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* GOOGLE HELIOS
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* GOOGLE KINDRED
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* GOOGLE KODAMA
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* GOOGLE KOHAKU
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* GOOGLE KRANE
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* GOOGLE MISTRAL
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* HP COMPAQ-8200-ELITE-SFF-PC
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* INTEL COMETLAKE-RVP
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* INTEL KBLRVP11
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* LENOVO R500
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* LENOVO X1
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* MSI MS7707
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* PORTWELL M107
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* PURISM LIBREM13-V4
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* PURISM LIBREM15-V4
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* SUPERMICRO X10SLM-PLUS-F
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* UP SQUARED
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Removed 7 mainboards:
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---------------------
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* GOOGLE BIP
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* GOOGLE DELAN
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* GOOGLE ROWAN
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* PCENGINES ALIX1C
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* PCENGINES ALIX2C
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* PCENGINES ALIX2D
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* PCENGINES ALIX6
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Removed 3 processors:
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---------------------
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* src/cpu/amd/geode\_lx
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* src/cpu/intel/model\_69x
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* src/cpu/intel/model\_6dx
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Added 2 socs:
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-------------
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* src/soc/amd/picasso
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* src/soc/qualcomm/qcs405
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Toolchain
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---------
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* Update to gcc 8.3.0, binutils 2.32, IASL 20190509, clang 8
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