coreboot-kgpe-d16/payloads
Vadim Bendebury 11aaf1f42a ipq8064: Add work around for slow timer clock
Libpayload libc requires timer clock frequency to be at least 1MHz.
Ipq8064 code presently provides a single option of 32kHz. Pretend to
be running at 1 MHz without additional accuracy.

This is a hack which will be reverted as soon as the SOC is configured
to supply a faster running clock.

BUG=chrome-os-partner:27784, chrome-os-partner:28880
TEST=with other changes depthcharge boots to the CLI console

Original-Change-Id: I80ec6652bc5693a549668cd6e824e9cf5c26b182
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/201342
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
(cherry picked from commit 466a59967b13986099106f8b44924648c1e6e6cd)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: I113689191db70710e7a45ccd02d672f482343e35
Reviewed-on: http://review.coreboot.org/8004
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
2015-01-04 00:27:50 +01:00
..
bayou GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
coreinfo payloads/coreinfo/multiboot_module.c: Trivial fix indents 2014-05-23 09:50:21 +02:00
external SeaBIOS Makefile.inc: Remove build dir for uppermem option 2014-11-02 08:15:35 +01:00
libpayload ipq8064: Add work around for slow timer clock 2015-01-04 00:27:50 +01:00
nvramcui nvramcui: Trim values when setting. 2014-01-19 15:09:29 +01:00