coreboot-kgpe-d16/src/arch/x86/lib
Sven Schnelle 7363ca35f0 X86: fix cpu_phys_address_size()
CPUs with CPUID level >= 0x80000008 can return
the number of physical address bits.

Change-Id: I1c0523b6a091c476af838d173ed9030280360d7f
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/599
Tested-by: build bot (Jenkins)
2012-01-31 22:47:39 +01:00
..
c_start.S Unify use of post_code 2011-04-11 20:17:22 +00:00
cbfs_and_run.c cbfs_and_run_core() is not part of the API, make it static. 2011-10-15 12:27:52 +02:00
cpu.c X86: fix cpu_phys_address_size() 2012-01-31 22:47:39 +01:00
exception.c more ifdef -> if fixes 2011-04-21 20:45:45 +00:00
id.inc Add coreboot version to id area 2012-01-18 11:22:06 +01:00
id.lds drop incorrectly used CONFIG_ROM_IMAGE_SIZE and unused CONFIG_ARCH 2011-04-14 20:21:49 +00:00
ioapic.c IOAPIC: fix bitmask 2011-10-19 06:49:38 +02:00
Makefile.inc pci_ops_mmconf: Move conditional compilation to Makefile 2012-01-26 22:15:19 +01:00
pci_ops_auto.c After this has been brought up many times before, rename src/arch/i386 to 2010-12-11 20:33:41 +00:00
pci_ops_conf1.c pci_ops_conf: Indentation fixes 2012-01-24 22:45:32 +01:00
pci_ops_conf2.c pci_ops_conf: Indentation fixes 2012-01-24 22:45:32 +01:00
pci_ops_mmconf.c pci_ops_mmconf: Move conditional compilation to Makefile 2012-01-26 22:15:19 +01:00
romcc_console.c Simplify coreboot's console/console.h 2011-04-20 21:11:22 +00:00
romstage_console.c Do full flush on uart8250 only at end of printk. 2011-07-12 11:36:20 +02:00
stages.c After this has been brought up many times before, rename src/arch/i386 to 2010-12-11 20:33:41 +00:00
walkcbfs.S add some comments to walkcbfs.S 2011-04-14 20:33:53 +00:00