coreboot-kgpe-d16/src
Duncan Laurie ba5487acf4 google/chell: Set DPTF critical temperature to 99C
If we boot without a heatsink then DPTF may power off the system when
it starts if the CPU temp is >90C.  Since TJmax is 100C set the
critical threshold to just below that value.

Also remove the active thresholds as chell does not have a fan.
This will have DPTF use the default values but without the DPTF active
policy it shouldn't get used.

BUG=chrome-os-partner:46694
BRANCH=none
TEST=build and boot on chell w/o a heatsink

Change-Id: Id9e8f2c547468db8ad0edaf6c362a9a9bb5b95a2
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 23d9117d5d7a4b44fc2298352eba133747f8e246
Original-Change-Id: Ib8e074098e3956efeed0f9b7f8b16652658db374
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/308728
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/12202
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-10-28 22:27:45 +01:00
..
acpi acpi/sata: add generic sata ssdt port generator 2015-06-07 01:24:47 +02:00
arch armv7: Word-sized/half-word-sized memory operations for 32/16 bit read/write 2015-10-17 18:10:29 +00:00
commonlib vboot: prepare for x86 verstage 2015-10-11 23:57:29 +00:00
console x86: add standalone verstage support 2015-10-14 17:07:52 +00:00
cpu cpu/intel/fsp_model_206ax: Load microcode in coreboot 2015-10-28 19:22:04 +01:00
device device: Stop and output time in `scan_bus()` 2015-10-27 17:14:11 +01:00
drivers FSP1_1: Always use common code 2015-10-27 15:19:23 +01:00
ec ec/chrome: Disable LPC Continuous Serial IRQ Select 2015-10-27 15:18:50 +01:00
include include/timer.h: Guard `timer_monotonic_get()` calls by `CONFIG_HAVE_MONOTONIC_TIMER` 2015-10-27 16:07:50 +01:00
lib jpeg: add jpeg_fetch_size() 2015-10-28 19:15:17 +01:00
mainboard google/chell: Set DPTF critical temperature to 99C 2015-10-28 22:27:45 +01:00
northbridge northbridge/amd/amdfam10: Limit maximum RAM clock to BKDG recommendations 2015-10-27 05:31:57 +01:00
soc intel/skylake: Clean up USB configuration in devicetree 2015-10-27 15:20:36 +01:00
southbridge southbridge/amd/sb700: Add Suspend to RAM (S3) support 2015-10-27 20:16:29 +01:00
superio superio/nuvoton/nct5572d: Enable power state after power failure support 2015-10-23 20:04:07 +02:00
vendorcode vboot: check vb2_shared_data flags for manual recovery 2015-10-28 22:26:23 +01:00
Kconfig Separate bootsplash image menuconfig option from others 2015-10-25 07:28:38 +01:00