coreboot-kgpe-d16/src/northbridge
Angel Pons bbc80f4405 nb/intel/x4x: Define and use MMCONF_BUS_NUMBER
Note that bootblock.c originally wrote a reserved bit of the PCIEXBAR
register. The `length` bitfield was set to 0, so assume 256 busses.
Moreover, the ASL reservation for MMCONFIG was only for 64 busses.

Change-Id: I7366a5096aacd92401535be020358447650b4247
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49759
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-30 23:12:44 +00:00
..
amd device/Kconfig: Declare MMCONF symbols' type once 2021-01-29 17:46:55 +00:00
intel nb/intel/x4x: Define and use MMCONF_BUS_NUMBER 2021-01-30 23:12:44 +00:00