coreboot-kgpe-d16/src/soc/intel/skylake/bootblock
Maxim Polyakov 571d07d45b soc/intel/skylake: Add Lewisburg family PCH support
This patch adds Lewisburg C62x Series PCH support by adding the
Production and Super SKUs of the following PCI devices:

 - LPC or eSPI Controllers,
 - PCI Express Root Ports,
 - SSATA and SATA Controllers,
 - SMBus,
 - SPI Controller,
 - ME/HECI,
 - Audio,
 - P2SB,
 - Power Management Controller.

These changes are in accordance with the documentation:
[*] page 39, Intel(R) C620 Series Chipset Platform Controller Hub
    (PCH) Datasheet, May 2019. Document Number: 336067-007US

Change-Id: I7eaf2c1bb725ffed66f86c023c415ad17fe5793d
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35030
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lance Zhao <lance.zhao@gmail.com>
2019-09-06 15:32:33 +00:00
..
bootblock.c lib/bootblock: Add simplified entry with basetime 2019-08-26 21:11:31 +00:00
cpu.c
pch.c soc/{amd,intel}/chip: Use local include for chip.h 2019-04-26 16:49:13 +00:00
report_platform.c soc/intel/skylake: Add Lewisburg family PCH support 2019-09-06 15:32:33 +00:00