coreboot-kgpe-d16/src/cpu/intel/car
Kyösti Mälkki bc78e014c5 cpu/intel/car/p4-netburst: Remove delay loops
While commented as 10 ms + 250 us, those delay loops actually
accounted for a total of 840 ms. And they seem unnecessary
as followup code has potentially infinite retries when
polling for status changes.

Tested on aopen/dxplplusu, dual-socket P4 Xeon HT model_f2x.

Change-Id: Ib7d1d66ed29c62d97073872f0b7809d719ac2324
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36595
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2019-11-04 11:38:38 +00:00
..
core2 cpu/intel/car: Correctly cache the bootblock with C_ENVIRONMENT_BOOTBLOCK 2019-10-28 11:59:03 +00:00
non-evict AUTHORS: Move src/cpu/intel copyrights into AUTHORS file 2019-09-10 12:51:10 +00:00
p3 cpu/intel/car: Correctly cache the bootblock with C_ENVIRONMENT_BOOTBLOCK 2019-10-28 11:59:03 +00:00
p4-netburst cpu/intel/car/p4-netburst: Remove delay loops 2019-11-04 11:38:38 +00:00
bootblock.c lib/bootblock: Add simplified entry with basetime 2019-08-26 21:11:31 +00:00
bootblock.h cpu/intel/car: Enable use of C_ENVIRONMENT_BOOTBLOCK 2019-01-08 15:35:08 +00:00
romstage.c intel/car: Use common TS_START_ROMSTAGE 2019-08-26 22:53:31 +00:00