Rudolf Marek bcaea142f3 1) wraps the s3 parts of chipset code/memory init code with if CONFIG_HAVE_ACPI_RESUME == 1 getting rid of ugly define in romstage.c ... 2) the patch implements get_cbmem_toc in chipset specific way if defined. On Intel targets it should be unchanged. On K8T890 the the cbmem_toc is read from NVRAM. Why you ask? Because we cannot do it as on intel, because the framebuffer might be there making it hard to look for it in memory (and remember we need it so early that everying is uncached) 3) The patch removes hardcoded limits for suspend/resume save area (it was 1MB) on intel. Now it computes right numbers itself. 4) it impelements saving the memory during CAR to reserved range in sane way. First the sysinfo area (CAR data) is copied, then the rest after car is disabled (cached copy is used). I changed bit also the the copy of CAR area is now done uncached for target which I feel is more right. I think I did not change the Intel suspend/resume behaviour but best would be if someone can test it. Please note this patch was unfinished on my drive since ages and it would be very nice to get it in to prevent bit rotten it again. Now I feel it is done good way and should not break anything. I did a test with abuild and it seems fine. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de> Acked-by: Stefan Reinauer <stepan@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6117 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1		2010-11-22 22:00:52 +00:00
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arch/i386	1) wraps the s3 parts of chipset code/memory init code with if CONFIG_HAVE_ACPI_RESUME == 1 getting rid of ugly define in romstage.c	2010-11-22 22:00:52 +00:00
boot	Rename build system variables to be more intuitive, and	2010-09-30 16:55:02 +00:00
console	Workaround to get die.c to work with romcc.	2010-11-22 13:07:10 +00:00
cpu	1) wraps the s3 parts of chipset code/memory init code with if CONFIG_HAVE_ACPI_RESUME == 1 getting rid of ugly define in romstage.c	2010-11-22 22:00:52 +00:00
devices	Printing coreboot debug messages on VGA console is pretty much useless, since	2010-11-22 08:09:50 +00:00
drivers	Printing coreboot debug messages on VGA console is pretty much useless, since	2010-11-22 08:09:50 +00:00
include	1) wraps the s3 parts of chipset code/memory init code with if CONFIG_HAVE_ACPI_RESUME == 1 getting rid of ugly define in romstage.c	2010-11-22 22:00:52 +00:00
lib	1) wraps the s3 parts of chipset code/memory init code with if CONFIG_HAVE_ACPI_RESUME == 1 getting rid of ugly define in romstage.c	2010-11-22 22:00:52 +00:00
mainboard	1) wraps the s3 parts of chipset code/memory init code with if CONFIG_HAVE_ACPI_RESUME == 1 getting rid of ugly define in romstage.c	2010-11-22 22:00:52 +00:00
northbridge	1) wraps the s3 parts of chipset code/memory init code with if CONFIG_HAVE_ACPI_RESUME == 1 getting rid of ugly define in romstage.c	2010-11-22 22:00:52 +00:00
pc80	- move EHCI_BAR_INDEX to ehci.h - it's constant as per EHCI spec 2.3.1	2010-10-05 13:40:31 +00:00
southbridge	1) wraps the s3 parts of chipset code/memory init code with if CONFIG_HAVE_ACPI_RESUME == 1 getting rid of ugly define in romstage.c	2010-11-22 22:00:52 +00:00
superio	Drop W83627THF, it's the same device as W83627THG.	2010-11-16 23:15:37 +00:00
Kconfig	Ensure that config options hidden by r6054 have defaults, and fix MALLOCDBG()	2010-11-10 02:00:32 +00:00
Kconfig.deprecated_options	…