bd72bfece2
The disablement of SSE2 was not honoured since there is explicit select under CPU_INTEL_MODEL_F2X. The removed commentary originates probably from ROMCC romstage implementation. Change-Id: I7d9ac007406a82c498f3ed23568e2ff064504983 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69443 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com> |
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amd | ||
armltd | ||
intel | ||
power9 | ||
qemu-power8 | ||
qemu-x86 | ||
x86 | ||
Kconfig | ||
Makefile.inc |